dcache response bus optimization

2021-07-12 10:14:48 -07:00
parent b99fb41d52
commit 5c40422e4f
16 changed files with 350 additions and 259 deletions
--- a/hw/rtl/VX_core.v
+++ b/hw/rtl/VX_core.v
@@ -101,6 +101,7 @@ module VX_core #(

        // Dcache core reponse    
        .dcache_rsp_valid   (dcache_core_rsp_if.valid),
+        .dcache_rsp_tmask   (dcache_core_rsp_if.tmask),
        .dcache_rsp_data    (dcache_core_rsp_if.data),
        .dcache_rsp_tag     (dcache_core_rsp_if.tag),
        .dcache_rsp_ready   (dcache_core_rsp_if.ready),