simulation framework refactoring

doc/codebase.md

@@ -7,25 +7,30 @@ The directory/file layout of the Vortex codebase is as followed:
     - `cache`: cache subsystem code
     - `fp_cores`: floating point unit code
     - `interfaces`: interfaces for inter-module communication
-    - `libs`: general-purpose modules (i.e., encoder, arbiter, ...)
+    - `libs`: general-purpose RTL modules
   - `syn`: synthesis directory
     - `opae`: OPAE synthesis scripts
     - `quartus`: Quartus synthesis scripts    
     - `synopsys`: Synopsys synthesis scripts
+    - `modelsim`: Modelsim synthesis scripts
     - `yosys`: Yosys synthesis scripts
-  - `simulate`: baseline RTL simulator (used by RTLSIM)
   - `unit_tests`: unit tests for some hardware components
-- `driver`: Host driver software
+- `driver`: host drivers repository
   - `include`: Vortex driver public headers
-  - `opae`: software driver that uses Intel OPAE
-  - `vlsim`: software driver that simulates Full RTL (include AFU)
-  - `rtlsim`: software driver that simulates processor RTL
+  - `stub`: Vortex stub driver library
+  - `fpga`: software driver that uses Intel OPAE FPGA
+  - `asesim`: software driver that uses Intel ASE simulator
+  - `vlsim`: software driver that uses vlsim simulator
+  - `rtlsim`: software driver that uses rtlsim simulator
   - `simx`: software driver that uses simX simulator
-- `runtime`: Kernel runtime software
+- `runtime`: kernel runtime software
   - `include`: Vortex runtime public headers
   - `linker`: linker file for compiling kernels
   - `src`: runtime implementation
-- `simX`: cycle approximate simulator for vortex
+- `sim`: 
+  - `vlsim`: AFU RTL simulator
+  - `rtlsim`: processor RTL simulator
+  - `simX`: cycle approximate simulator for vortex
 - `tests`: tests repository.
   - `runtime`: runtime tests
   - `regression`: regression tests