diff --git a/hw/rtl/fpu/VX_tensor_dpu.sv b/hw/rtl/fpu/VX_tensor_dpu.sv
index 9a8dfa20..e40fe92b 100644
--- a/hw/rtl/fpu/VX_tensor_dpu.sv
+++ b/hw/rtl/fpu/VX_tensor_dpu.sv
@@ -300,7 +300,7 @@ module VX_tensor_threadgroup #(
         wire [31:0] d_col_sel = (substep_in == 1'b0) ? d_col : (d_col + 1);
 
         // Dot product (FEDP) unit generated from Chisel
-        if (FP16 != 0) begin
+`ifdef TENSOR_DPU_FP16
             TensorDotProductUnit fedp (
               .clock (clk),
               .reset (reset),
@@ -318,7 +318,7 @@ module VX_tensor_threadgroup #(
               .io_out_valid     (fedp_valids[i]),
               .io_out_bits_data (D_half[i])
             );
-        end else begin
+`else
             TensorDotProductUnit fedp (
               .clock (clk),
               .reset (reset),
@@ -332,7 +332,7 @@ module VX_tensor_threadgroup #(
               .io_out_valid     (fedp_valids[i]),
               .io_out_bits_data (D_half[i])
             );
-        end
+`endif
     end
 
     assign valid_out = fedp_valid_out && (substep_out == 1'b1);