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New GPR structure - Clone or WSPAWN

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This commit is contained in:
felsabbagh3
2019-09-09 22:17:20 -04:00
parent 1882147370
commit 4e8da1811a
21 changed files with 1997 additions and 6204 deletions
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2
rtl/VX_decode.v
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@@ -165,7 +165,7 @@ module VX_decode(
.VX_gpr_jal (VX_gpr_jal),
.VX_gpr_clone (VX_gpr_clone),
.VX_gpr_wspawn (VX_gpr_wspawn),
.out_a_reg_data (VX_frE_to_bckE_req.a_reg_data),
.out_b_reg_data (VX_frE_to_bckE_req.b_reg_data),
.out_clone_stall(out_clone_stall)

42
rtl/VX_gpr.v
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@@ -1,8 +1,42 @@
`include "VX_define.v"
module VX_gpr (
input clk, // Clock
input clk_en, // Clock Enable
input rst_n, // Asynchronous reset active low
input wire clk,
input wire valid_write_request,
input wire valid_read_request,
VX_gpr_read_inter VX_gpr_read,
VX_wb_inter VX_writeback_inter,
output reg[`NT_M1:0][31:0] out_a_reg_data,
output reg[`NT_M1:0][31:0] out_b_reg_data
);
logic[`NT_M1:0][31:0] gpr[31:0]; // gpr[register_number][thread_number][data_bits]
wire write_enable;
assign write_enable = valid_write_request && ((VX_writeback_inter.wb != 0) && (VX_writeback_inter.rd != 5'h0));
// assign read_enable = valid_request;
genvar thread_index;
always_ff@(posedge clk)
begin
if (write_enable) begin
for (thread_index = 0; thread_index <= `NT_M1; thread_index = thread_index + 1) begin
if (VX_writeback_inter.wb_valid[thread_index]) begin
gpr[VX_writeback_inter.rd][thread_index] <= VX_writeback_inter.write_data[thread_index];
end
end
end
end
always @(negedge clk) begin
if (valid_read_request) begin
out_a_reg_data <= gpr[VX_gpr_read.rs1];
out_b_reg_data <= gpr[VX_gpr_read.rs2];
end
end
endmodule

148
rtl/VX_gpr_wrapper.v
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@@ -2,9 +2,10 @@
module VX_gpr_wrapper (
input wire clk,
VX_gpr_read_inter VX_gpr_read,
VX_wb_inter VX_writeback_inter,
VX_forward_response_inter VX_fwd_rsp,
VX_gpr_read_inter VX_gpr_read,
VX_gpr_jal_inter VX_gpr_jal,
VX_gpr_clone_inter VX_gpr_clone,
VX_gpr_wspawn_inter VX_gpr_wspawn,
@@ -15,81 +16,102 @@ module VX_gpr_wrapper (
);
wire[`NW-1:0][`NT_M1:0][31:0] temp_a_reg_data;
wire[`NW-1:0][`NT_M1:0][31:0] temp_b_reg_data;
wire[`NT_M1:0][31:0] temp_a_reg_data;
wire[`NT_M1:0][31:0] temp_b_reg_data;
wire[`NT_M1:0][31:0] jal_data;
genvar index;
for (index = 0; index <= `NT_M1; index = index + 1) assign jal_data[index] = VX_gpr_jal.curr_PC;
assign out_a_reg_data = VX_gpr_jal.is_jal ? jal_data : temp_a_reg_data[VX_gpr_read.warp_num];
assign out_a_reg_data = (VX_gpr_jal.is_jal ? jal_data : (VX_fwd_rsp.src1_fwd ? VX_fwd_rsp.src1_fwd_data : temp_a_reg_data));
assign out_b_reg_data = (VX_fwd_rsp.src2_fwd ? VX_fwd_rsp.src2_fwd_data : temp_b_reg_data);
assign out_b_reg_data = temp_b_reg_data[VX_gpr_read.warp_num];
wire[31:0][31:0] w0_t0_registers;
wire[`NW-1:0] temp_clone_stall;
wire[`NW-1:0] temp_clone_stall = 0;
assign out_clone_stall = (|temp_clone_stall);
wire curr_warp_zero = VX_gpr_read.warp_num == 0;
wire context_zero_valid = (VX_writeback_inter.wb_warp_num == 0);
wire real_zero_isclone = VX_gpr_clone.is_clone && (VX_gpr_clone.warp_num == 0);
wire write_register = (VX_writeback_inter.wb != 2'h0) ? (1'b1) : (1'b0);
VX_context VX_Context_zero(
.clk (clk),
.in_warp (curr_warp_zero),
.in_wb_warp (context_zero_valid),
.in_valid (VX_writeback_inter.wb_valid),
.in_rd (VX_writeback_inter.rd),
.in_src1 (VX_gpr_read.rs1),
.in_src2 (VX_gpr_read.rs2),
.in_is_clone (real_zero_isclone),
.in_src1_fwd (VX_fwd_rsp.src1_fwd),
.in_src1_fwd_data (VX_fwd_rsp.src1_fwd_data),
.in_src2_fwd (VX_fwd_rsp.src2_fwd),
.in_src2_fwd_data (VX_fwd_rsp.src2_fwd_data),
.in_write_register(write_register),
.in_write_data (VX_writeback_inter.write_data),
.out_a_reg_data (temp_a_reg_data[0]),
.out_b_reg_data (temp_b_reg_data[0]),
.out_clone_stall (temp_clone_stall[0]),
.w0_t0_registers (w0_t0_registers)
);
genvar r;
genvar warp_index;
generate
for (r = 1; r < `NW; r = r + 1) begin
wire context_glob_valid = (VX_writeback_inter.wb_warp_num == r);
wire curr_warp_glob = VX_gpr_read.warp_num == r;
wire real_wspawn = VX_gpr_wspawn.is_wspawn && (VX_gpr_wspawn.which_wspawn == r);
wire real_isclone = VX_gpr_clone.is_clone && (VX_gpr_clone.warp_num == r);
VX_context_slave VX_Context_one(
.clk (clk),
.in_warp (curr_warp_glob),
.in_wb_warp (context_glob_valid),
.in_valid (VX_writeback_inter.wb_valid),
.in_rd (VX_writeback_inter.rd),
.in_src1 (VX_gpr_read.rs1),
.in_src2 (VX_gpr_read.rs2),
.in_is_clone (real_isclone),
.in_src1_fwd (VX_fwd_rsp.src1_fwd),
.in_src1_fwd_data (VX_fwd_rsp.src1_fwd_data),
.in_src2_fwd (VX_fwd_rsp.src2_fwd),
.in_src2_fwd_data (VX_fwd_rsp.src2_fwd_data),
.in_write_register(write_register),
.in_write_data (VX_writeback_inter.write_data),
.in_wspawn_regs (w0_t0_registers),
.in_wspawn (real_wspawn),
.out_a_reg_data (temp_a_reg_data[r]),
.out_b_reg_data (temp_b_reg_data[r]),
.out_clone_stall (temp_clone_stall[r])
);
for (warp_index = 0; warp_index < `NW; warp_index = warp_index + 1) begin
wire valid_write_request = warp_index == VX_writeback_inter.wb_warp_num;
wire valid_read_request = warp_index == VX_gpr_read.warp_num;
VX_gpr vx_gpr(
.clk (clk),
.valid_write_request(valid_write_request),
.valid_read_request (valid_read_request),
.VX_gpr_read (VX_gpr_read),
.VX_writeback_inter (VX_writeback_inter),
.out_a_reg_data (temp_a_reg_data),
.out_b_reg_data (temp_b_reg_data)
);
end
endgenerate
// wire[31:0][31:0] w0_t0_registers;
// wire curr_warp_zero = VX_gpr_read.warp_num == 0;
// wire context_zero_valid = (VX_writeback_inter.wb_warp_num == 0);
// wire real_zero_isclone = VX_gpr_clone.is_clone && (VX_gpr_clone.warp_num == 0);
// wire write_register = (VX_writeback_inter.wb != 2'h0) ? (1'b1) : (1'b0);
// VX_context VX_Context_zero(
// .clk (clk),
// .in_warp (curr_warp_zero),
// .in_wb_warp (context_zero_valid),
// .in_valid (VX_writeback_inter.wb_valid),
// .in_rd (VX_writeback_inter.rd),
// .in_src1 (VX_gpr_read.rs1),
// .in_src2 (VX_gpr_read.rs2),
// .in_is_clone (real_zero_isclone),
// .in_src1_fwd (VX_fwd_rsp.src1_fwd),
// .in_src1_fwd_data (VX_fwd_rsp.src1_fwd_data),
// .in_src2_fwd (VX_fwd_rsp.src2_fwd),
// .in_src2_fwd_data (VX_fwd_rsp.src2_fwd_data),
// .in_write_register(write_register),
// .in_write_data (VX_writeback_inter.write_data),
// .out_a_reg_data (temp_a_reg_data[0]),
// .out_b_reg_data (temp_b_reg_data[0]),
// .out_clone_stall (temp_clone_stall[0]),
// .w0_t0_registers (w0_t0_registers)
// );
// genvar r;
// generate
// for (r = 1; r < `NW; r = r + 1) begin
// wire context_glob_valid = (VX_writeback_inter.wb_warp_num == r);
// wire curr_warp_glob = VX_gpr_read.warp_num == r;
// wire real_wspawn = VX_gpr_wspawn.is_wspawn && (VX_gpr_wspawn.which_wspawn == r);
// wire real_isclone = VX_gpr_clone.is_clone && (VX_gpr_clone.warp_num == r);
// VX_context_slave VX_Context_one(
// .clk (clk),
// .in_warp (curr_warp_glob),
// .in_wb_warp (context_glob_valid),
// .in_valid (VX_writeback_inter.wb_valid),
// .in_rd (VX_writeback_inter.rd),
// .in_src1 (VX_gpr_read.rs1),
// .in_src2 (VX_gpr_read.rs2),
// .in_is_clone (real_isclone),
// .in_src1_fwd (VX_fwd_rsp.src1_fwd),
// .in_src1_fwd_data (VX_fwd_rsp.src1_fwd_data),
// .in_src2_fwd (VX_fwd_rsp.src2_fwd),
// .in_src2_fwd_data (VX_fwd_rsp.src2_fwd_data),
// .in_write_register(write_register),
// .in_write_data (VX_writeback_inter.write_data),
// .in_wspawn_regs (w0_t0_registers),
// .in_wspawn (real_wspawn),
// .out_a_reg_data (temp_a_reg_data[r]),
// .out_b_reg_data (temp_b_reg_data[r]),
// .out_clone_stall (temp_clone_stall[r])
// );
// end
// endgenerate
endmodule

3
rtl/interfaces/VX_gpr_clone_inter.v
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@@ -5,9 +5,10 @@
interface VX_gpr_clone_inter ();
/* verilator lint_off UNUSED */
wire is_clone;
wire[`NW_M1:0] warp_num;
/* verilator lint_on UNUSED */
modport snk (

2
rtl/interfaces/VX_gpr_jal_inter.v
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@@ -5,11 +5,9 @@
interface VX_gpr_jal_inter ();
wire is_jal;
wire[31:0] curr_PC;
modport snk (
input is_jal,
input curr_PC

13
rtl/interfaces/VX_gpr_read_inter.sv
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@@ -10,19 +10,6 @@ interface VX_gpr_read_inter ();
wire[4:0] rs2;
wire[`NW_M1:0] warp_num;
modport snk (
input rs1,
input rs2,
input warp_num
);
modport src (
output rs1,
output rs2,
output warp_num
);
endinterface

3
rtl/interfaces/VX_gpr_wspawn_inter.v
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@@ -5,10 +5,11 @@
interface VX_gpr_wspawn_inter ();
/* verilator lint_off UNUSED */
wire is_wspawn;
wire[`NW_M1:0] which_wspawn;
// wire[`NW_M1:0] warp_num;
/* verilator lint_on UNUSED */
modport snk (

BIN
rtl/obj_dir/VVortex
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Binary file not shown.

6987
rtl/obj_dir/VVortex.cpp
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File diff suppressed because it is too large Load Diff

263
rtl/obj_dir/VVortex.h
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@@ -89,7 +89,6 @@ VL_MODULE(VVortex) {
VL_SIG8(Vortex__DOT__vx_front_end__DOT__vx_fetch__DOT__genblk2__BRA__7__KET____DOT__warp_zero_stall,0,0);
VL_SIG8(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__is_itype,0,0);
VL_SIG8(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__is_csr,0,0);
VL_SIG8(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__is_clone,0,0);
VL_SIG8(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__is_jalrs,0,0);
VL_SIG8(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__is_jmprt,0,0);
VL_SIG8(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__is_wspawn,0,0);
@@ -99,42 +98,15 @@ VL_MODULE(VVortex) {
VL_SIG8(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__jmprt_thread_mask,3,0);
VL_SIG8(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__is_ebreak,0,0);
VL_SIG8(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__temp_final_alu,4,0);
VL_SIG8(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__temp_clone_stall,7,0);
VL_SIG8(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__real_zero_isclone,0,0);
VL_SIG8(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__genblk2__BRA__1__KET____DOT__real_wspawn,0,0);
VL_SIG8(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__genblk2__BRA__1__KET____DOT__real_isclone,0,0);
VL_SIG8(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__genblk2__BRA__2__KET____DOT__real_wspawn,0,0);
VL_SIG8(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__genblk2__BRA__2__KET____DOT__real_isclone,0,0);
VL_SIG8(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__genblk2__BRA__3__KET____DOT__real_wspawn,0,0);
VL_SIG8(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__genblk2__BRA__3__KET____DOT__real_isclone,0,0);
VL_SIG8(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__genblk2__BRA__4__KET____DOT__real_wspawn,0,0);
VL_SIG8(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__genblk2__BRA__4__KET____DOT__real_isclone,0,0);
VL_SIG8(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__genblk2__BRA__5__KET____DOT__real_wspawn,0,0);
VL_SIG8(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__genblk2__BRA__5__KET____DOT__real_isclone,0,0);
VL_SIG8(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__genblk2__BRA__6__KET____DOT__real_wspawn,0,0);
VL_SIG8(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__genblk2__BRA__6__KET____DOT__real_isclone,0,0);
VL_SIG8(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__genblk2__BRA__7__KET____DOT__real_wspawn,0,0);
VL_SIG8(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__genblk2__BRA__7__KET____DOT__real_isclone,0,0);
VL_SIG8(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__VX_Context_zero__DOT__state_stall,5,0);
VL_SIG8(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__genblk2__BRA__1__KET____DOT__VX_Context_one__DOT__clone_state_stall,5,0);
VL_SIG8(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__genblk2__BRA__1__KET____DOT__VX_Context_one__DOT__wspawn_state_stall,5,0);
VL_SIG8(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__genblk2__BRA__2__KET____DOT__VX_Context_one__DOT__clone_state_stall,5,0);
VL_SIG8(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__genblk2__BRA__2__KET____DOT__VX_Context_one__DOT__wspawn_state_stall,5,0);
VL_SIG8(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__genblk2__BRA__3__KET____DOT__VX_Context_one__DOT__clone_state_stall,5,0);
VL_SIG8(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__genblk2__BRA__3__KET____DOT__VX_Context_one__DOT__wspawn_state_stall,5,0);
VL_SIG8(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__genblk2__BRA__4__KET____DOT__VX_Context_one__DOT__clone_state_stall,5,0);
VL_SIG8(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__genblk2__BRA__4__KET____DOT__VX_Context_one__DOT__wspawn_state_stall,5,0);
VL_SIG8(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__genblk2__BRA__5__KET____DOT__VX_Context_one__DOT__clone_state_stall,5,0);
VL_SIG8(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__genblk2__BRA__5__KET____DOT__VX_Context_one__DOT__wspawn_state_stall,5,0);
};
struct {
VL_SIG8(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__genblk2__BRA__6__KET____DOT__VX_Context_one__DOT__clone_state_stall,5,0);
VL_SIG8(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__genblk2__BRA__6__KET____DOT__VX_Context_one__DOT__wspawn_state_stall,5,0);
VL_SIG8(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__genblk2__BRA__7__KET____DOT__VX_Context_one__DOT__clone_state_stall,5,0);
VL_SIG8(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__genblk2__BRA__7__KET____DOT__VX_Context_one__DOT__wspawn_state_stall,5,0);
VL_SIG8(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__genblk2__BRA__0__KET____DOT__vx_gpr__DOT__write_enable,0,0);
VL_SIG8(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__genblk2__BRA__1__KET____DOT__vx_gpr__DOT__write_enable,0,0);
VL_SIG8(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__genblk2__BRA__2__KET____DOT__vx_gpr__DOT__write_enable,0,0);
VL_SIG8(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__genblk2__BRA__3__KET____DOT__vx_gpr__DOT__write_enable,0,0);
VL_SIG8(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__genblk2__BRA__4__KET____DOT__vx_gpr__DOT__write_enable,0,0);
VL_SIG8(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__genblk2__BRA__5__KET____DOT__vx_gpr__DOT__write_enable,0,0);
VL_SIG8(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__genblk2__BRA__6__KET____DOT__vx_gpr__DOT__write_enable,0,0);
VL_SIG8(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__genblk2__BRA__7__KET____DOT__vx_gpr__DOT__write_enable,0,0);
VL_SIG8(Vortex__DOT__vx_back_end__DOT__vx_memory__DOT__temp_branch_dir,0,0);
VL_SIG8(Vortex__DOT__vx_forwarding__DOT__out_src1_fwd,0,0);
VL_SIG8(Vortex__DOT__vx_forwarding__DOT__out_src2_fwd,0,0);
VL_SIG8(Vortex__DOT__vx_forwarding__DOT__src1_exe_fwd,0,0);
VL_SIG8(Vortex__DOT__vx_forwarding__DOT__src1_mem_fwd,0,0);
VL_SIG8(Vortex__DOT__vx_forwarding__DOT__src1_wb_fwd,0,0);
@@ -154,6 +126,8 @@ VL_MODULE(VVortex) {
VL_SIG(Vortex__DOT__vx_front_end__DOT__vx_fetch__DOT__genblk2__BRA__2__KET____DOT__VX_Warp__DOT__real_PC,31,0);
VL_SIG(Vortex__DOT__vx_front_end__DOT__vx_fetch__DOT__genblk2__BRA__2__KET____DOT__VX_Warp__DOT__temp_PC,31,0);
VL_SIG(Vortex__DOT__vx_front_end__DOT__vx_fetch__DOT__genblk2__BRA__3__KET____DOT__VX_Warp__DOT__real_PC,31,0);
};
struct {
VL_SIG(Vortex__DOT__vx_front_end__DOT__vx_fetch__DOT__genblk2__BRA__3__KET____DOT__VX_Warp__DOT__temp_PC,31,0);
VL_SIG(Vortex__DOT__vx_front_end__DOT__vx_fetch__DOT__genblk2__BRA__4__KET____DOT__VX_Warp__DOT__real_PC,31,0);
VL_SIG(Vortex__DOT__vx_front_end__DOT__vx_fetch__DOT__genblk2__BRA__4__KET____DOT__VX_Warp__DOT__temp_PC,31,0);
@@ -164,59 +138,9 @@ VL_MODULE(VVortex) {
VL_SIG(Vortex__DOT__vx_front_end__DOT__vx_fetch__DOT__genblk2__BRA__7__KET____DOT__VX_Warp__DOT__real_PC,31,0);
VL_SIG(Vortex__DOT__vx_front_end__DOT__vx_fetch__DOT__genblk2__BRA__7__KET____DOT__VX_Warp__DOT__temp_PC,31,0);
VL_SIGW(Vortex__DOT__vx_front_end__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value,71,0,3);
VL_SIGW(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__temp_a_reg_data,1023,0,32);
VL_SIGW(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__temp_b_reg_data,1023,0,32);
VL_SIGW(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__temp_a_reg_data,127,0,4);
VL_SIGW(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__temp_b_reg_data,127,0,4);
VL_SIGW(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__jal_data,127,0,4);
VL_SIGW(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__VX_Context_zero__DOT__rd1_register,127,0,4);
VL_SIGW(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__VX_Context_zero__DOT__rd2_register,127,0,4);
VL_SIGW(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers,1023,0,32);
VL_SIGW(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers,1023,0,32);
VL_SIGW(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers,1023,0,32);
VL_SIGW(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers,1023,0,32);
VL_SIGW(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__genblk2__BRA__1__KET____DOT__VX_Context_one__DOT__rd1_register,127,0,4);
VL_SIGW(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__genblk2__BRA__1__KET____DOT__VX_Context_one__DOT__rd2_register,127,0,4);
VL_SIGW(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__genblk2__BRA__1__KET____DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers,1023,0,32);
VL_SIGW(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__genblk2__BRA__1__KET____DOT__VX_Context_one__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers,1023,0,32);
VL_SIGW(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__genblk2__BRA__1__KET____DOT__VX_Context_one__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers,1023,0,32);
VL_SIGW(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__genblk2__BRA__1__KET____DOT__VX_Context_one__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers,1023,0,32);
VL_SIGW(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__genblk2__BRA__2__KET____DOT__VX_Context_one__DOT__rd1_register,127,0,4);
VL_SIGW(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__genblk2__BRA__2__KET____DOT__VX_Context_one__DOT__rd2_register,127,0,4);
VL_SIGW(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__genblk2__BRA__2__KET____DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers,1023,0,32);
VL_SIGW(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__genblk2__BRA__2__KET____DOT__VX_Context_one__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers,1023,0,32);
VL_SIGW(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__genblk2__BRA__2__KET____DOT__VX_Context_one__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers,1023,0,32);
VL_SIGW(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__genblk2__BRA__2__KET____DOT__VX_Context_one__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers,1023,0,32);
VL_SIGW(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__genblk2__BRA__3__KET____DOT__VX_Context_one__DOT__rd1_register,127,0,4);
VL_SIGW(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__genblk2__BRA__3__KET____DOT__VX_Context_one__DOT__rd2_register,127,0,4);
VL_SIGW(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__genblk2__BRA__3__KET____DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers,1023,0,32);
VL_SIGW(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__genblk2__BRA__3__KET____DOT__VX_Context_one__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers,1023,0,32);
VL_SIGW(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__genblk2__BRA__3__KET____DOT__VX_Context_one__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers,1023,0,32);
VL_SIGW(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__genblk2__BRA__3__KET____DOT__VX_Context_one__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers,1023,0,32);
VL_SIGW(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__genblk2__BRA__4__KET____DOT__VX_Context_one__DOT__rd1_register,127,0,4);
};
struct {
VL_SIGW(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__genblk2__BRA__4__KET____DOT__VX_Context_one__DOT__rd2_register,127,0,4);
VL_SIGW(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__genblk2__BRA__4__KET____DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers,1023,0,32);
VL_SIGW(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__genblk2__BRA__4__KET____DOT__VX_Context_one__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers,1023,0,32);
VL_SIGW(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__genblk2__BRA__4__KET____DOT__VX_Context_one__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers,1023,0,32);
VL_SIGW(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__genblk2__BRA__4__KET____DOT__VX_Context_one__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers,1023,0,32);
VL_SIGW(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__genblk2__BRA__5__KET____DOT__VX_Context_one__DOT__rd1_register,127,0,4);
VL_SIGW(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__genblk2__BRA__5__KET____DOT__VX_Context_one__DOT__rd2_register,127,0,4);
VL_SIGW(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__genblk2__BRA__5__KET____DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers,1023,0,32);
VL_SIGW(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__genblk2__BRA__5__KET____DOT__VX_Context_one__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers,1023,0,32);
VL_SIGW(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__genblk2__BRA__5__KET____DOT__VX_Context_one__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers,1023,0,32);
VL_SIGW(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__genblk2__BRA__5__KET____DOT__VX_Context_one__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers,1023,0,32);
VL_SIGW(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__genblk2__BRA__6__KET____DOT__VX_Context_one__DOT__rd1_register,127,0,4);
VL_SIGW(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__genblk2__BRA__6__KET____DOT__VX_Context_one__DOT__rd2_register,127,0,4);
VL_SIGW(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__genblk2__BRA__6__KET____DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers,1023,0,32);
VL_SIGW(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__genblk2__BRA__6__KET____DOT__VX_Context_one__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers,1023,0,32);
VL_SIGW(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__genblk2__BRA__6__KET____DOT__VX_Context_one__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers,1023,0,32);
VL_SIGW(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__genblk2__BRA__6__KET____DOT__VX_Context_one__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers,1023,0,32);
VL_SIGW(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__genblk2__BRA__7__KET____DOT__VX_Context_one__DOT__rd1_register,127,0,4);
VL_SIGW(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__genblk2__BRA__7__KET____DOT__VX_Context_one__DOT__rd2_register,127,0,4);
VL_SIGW(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__genblk2__BRA__7__KET____DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers,1023,0,32);
VL_SIGW(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__genblk2__BRA__7__KET____DOT__VX_Context_one__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers,1023,0,32);
VL_SIGW(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__genblk2__BRA__7__KET____DOT__VX_Context_one__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers,1023,0,32);
VL_SIGW(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__genblk2__BRA__7__KET____DOT__VX_Context_one__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers,1023,0,32);
VL_SIGW(Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value,489,0,16);
VL_SIG(Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2,31,0);
VL_SIG(Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2,31,0);
@@ -225,8 +149,6 @@ VL_MODULE(VVortex) {
VL_SIGW(Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value,463,0,15);
VL_SIGW(Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value,302,0,10);
VL_SIGW(Vortex__DOT__vx_back_end__DOT__vx_writeback__DOT__out_pc_data,127,0,4);
VL_SIGW(Vortex__DOT__vx_forwarding__DOT__out_src1_fwd_data,127,0,4);
VL_SIGW(Vortex__DOT__vx_forwarding__DOT__out_src2_fwd_data,127,0,4);
VL_SIGW(Vortex__DOT__vx_forwarding__DOT__use_execute_PC_next,127,0,4);
VL_SIGW(Vortex__DOT__vx_forwarding__DOT__use_memory_PC_next,127,0,4);
VL_SIGW(Vortex__DOT__vx_forwarding__DOT__use_writeback_PC_next,127,0,4);
@@ -257,125 +179,52 @@ VL_MODULE(VVortex) {
VL_SIG8(Vortex__DOT__vx_front_end__DOT__vx_fetch__DOT__genblk2__BRA__7__KET____DOT__VX_Warp__DOT__valid[4],0,0);
VL_SIG8(Vortex__DOT__vx_front_end__DOT__vx_fetch__DOT__genblk2__BRA__7__KET____DOT__VX_Warp__DOT__valid_zero[4],0,0);
VL_SIG8(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__in_valid[4],0,0);
VL_SIGW(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__genblk2__BRA__0__KET____DOT__vx_gpr__DOT__gpr[32],127,0,4);
VL_SIGW(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__genblk2__BRA__1__KET____DOT__vx_gpr__DOT__gpr[32],127,0,4);
VL_SIGW(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__genblk2__BRA__2__KET____DOT__vx_gpr__DOT__gpr[32],127,0,4);
VL_SIGW(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__genblk2__BRA__3__KET____DOT__vx_gpr__DOT__gpr[32],127,0,4);
VL_SIGW(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__genblk2__BRA__4__KET____DOT__vx_gpr__DOT__gpr[32],127,0,4);
VL_SIGW(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__genblk2__BRA__5__KET____DOT__vx_gpr__DOT__gpr[32],127,0,4);
VL_SIGW(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__genblk2__BRA__6__KET____DOT__vx_gpr__DOT__gpr[32],127,0,4);
VL_SIGW(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__genblk2__BRA__7__KET____DOT__vx_gpr__DOT__gpr[32],127,0,4);
};
// LOCAL VARIABLES
// Internals; generally not touched by application code
// Anonymous structures to workaround compiler member-count bugs
struct {
// Begin mtask footprint all:
VL_SIG8(__Vtableidx1,2,0);
VL_SIG8(__Vdly__Vortex__DOT__vx_front_end__DOT__vx_fetch__DOT__warp_num,3,0);
VL_SIG8(__Vclklast__TOP__clk,0,0);
VL_SIG8(__Vclklast__TOP__reset,0,0);
VL_SIG16(Vortex__DOT__vx_csr_handler__DOT____Vlvbound1,11,0);
VL_SIGW(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT____Vcellout__vx_grp_wrapper__out_b_reg_data,127,0,4);
VL_SIGW(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT____Vcellout__vx_grp_wrapper__out_a_reg_data,127,0,4);
VL_SIGW(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT____Vcellout__VX_Context_zero__out_b_reg_data,127,0,4);
VL_SIGW(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT____Vcellout__VX_Context_zero__out_a_reg_data,127,0,4);
VL_SIGW(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT____Vcellout__genblk2__BRA__1__KET____DOT__VX_Context_one__out_b_reg_data,127,0,4);
VL_SIGW(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT____Vcellout__genblk2__BRA__1__KET____DOT__VX_Context_one__out_a_reg_data,127,0,4);
VL_SIGW(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT____Vcellout__genblk2__BRA__2__KET____DOT__VX_Context_one__out_b_reg_data,127,0,4);
VL_SIGW(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT____Vcellout__genblk2__BRA__2__KET____DOT__VX_Context_one__out_a_reg_data,127,0,4);
VL_SIGW(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT____Vcellout__genblk2__BRA__3__KET____DOT__VX_Context_one__out_b_reg_data,127,0,4);
VL_SIGW(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT____Vcellout__genblk2__BRA__3__KET____DOT__VX_Context_one__out_a_reg_data,127,0,4);
VL_SIGW(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT____Vcellout__genblk2__BRA__4__KET____DOT__VX_Context_one__out_b_reg_data,127,0,4);
VL_SIGW(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT____Vcellout__genblk2__BRA__4__KET____DOT__VX_Context_one__out_a_reg_data,127,0,4);
VL_SIGW(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT____Vcellout__genblk2__BRA__5__KET____DOT__VX_Context_one__out_b_reg_data,127,0,4);
VL_SIGW(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT____Vcellout__genblk2__BRA__5__KET____DOT__VX_Context_one__out_a_reg_data,127,0,4);
VL_SIGW(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT____Vcellout__genblk2__BRA__6__KET____DOT__VX_Context_one__out_b_reg_data,127,0,4);
VL_SIGW(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT____Vcellout__genblk2__BRA__6__KET____DOT__VX_Context_one__out_a_reg_data,127,0,4);
VL_SIGW(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT____Vcellout__genblk2__BRA__7__KET____DOT__VX_Context_one__out_b_reg_data,127,0,4);
VL_SIGW(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT____Vcellout__genblk2__BRA__7__KET____DOT__VX_Context_one__out_a_reg_data,127,0,4);
VL_SIG(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_src2_data,31,0);
VL_SIG(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_src1_data,31,0);
VL_SIG(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__VX_Context_zero__DOT____Vcellout__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__out_src2_data,31,0);
VL_SIG(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__VX_Context_zero__DOT____Vcellout__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__out_src1_data,31,0);
VL_SIG(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__VX_Context_zero__DOT____Vcellout__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__out_src2_data,31,0);
VL_SIG(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__VX_Context_zero__DOT____Vcellout__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__out_src1_data,31,0);
VL_SIG(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__VX_Context_zero__DOT____Vcellout__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__out_src2_data,31,0);
VL_SIG(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__VX_Context_zero__DOT____Vcellout__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__out_src1_data,31,0);
VL_SIG(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__genblk2__BRA__1__KET____DOT__VX_Context_one__DOT____Vcellout__vx_register_file_master__out_src2_data,31,0);
VL_SIG(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__genblk2__BRA__1__KET____DOT__VX_Context_one__DOT____Vcellout__vx_register_file_master__out_src1_data,31,0);
VL_SIG(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__genblk2__BRA__1__KET____DOT__VX_Context_one__DOT____Vcellout__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__out_src2_data,31,0);
VL_SIG(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__genblk2__BRA__1__KET____DOT__VX_Context_one__DOT____Vcellout__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__out_src1_data,31,0);
VL_SIG(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__genblk2__BRA__1__KET____DOT__VX_Context_one__DOT____Vcellout__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__out_src2_data,31,0);
VL_SIG(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__genblk2__BRA__1__KET____DOT__VX_Context_one__DOT____Vcellout__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__out_src1_data,31,0);
VL_SIG(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__genblk2__BRA__1__KET____DOT__VX_Context_one__DOT____Vcellout__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__out_src2_data,31,0);
VL_SIG(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__genblk2__BRA__1__KET____DOT__VX_Context_one__DOT____Vcellout__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__out_src1_data,31,0);
VL_SIG(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__genblk2__BRA__2__KET____DOT__VX_Context_one__DOT____Vcellout__vx_register_file_master__out_src2_data,31,0);
VL_SIG(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__genblk2__BRA__2__KET____DOT__VX_Context_one__DOT____Vcellout__vx_register_file_master__out_src1_data,31,0);
VL_SIG(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__genblk2__BRA__2__KET____DOT__VX_Context_one__DOT____Vcellout__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__out_src2_data,31,0);
VL_SIG(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__genblk2__BRA__2__KET____DOT__VX_Context_one__DOT____Vcellout__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__out_src1_data,31,0);
VL_SIG(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__genblk2__BRA__2__KET____DOT__VX_Context_one__DOT____Vcellout__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__out_src2_data,31,0);
VL_SIG(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__genblk2__BRA__2__KET____DOT__VX_Context_one__DOT____Vcellout__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__out_src1_data,31,0);
VL_SIG(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__genblk2__BRA__2__KET____DOT__VX_Context_one__DOT____Vcellout__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__out_src2_data,31,0);
VL_SIG(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__genblk2__BRA__2__KET____DOT__VX_Context_one__DOT____Vcellout__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__out_src1_data,31,0);
VL_SIG(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__genblk2__BRA__3__KET____DOT__VX_Context_one__DOT____Vcellout__vx_register_file_master__out_src2_data,31,0);
VL_SIG(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__genblk2__BRA__3__KET____DOT__VX_Context_one__DOT____Vcellout__vx_register_file_master__out_src1_data,31,0);
VL_SIG(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__genblk2__BRA__3__KET____DOT__VX_Context_one__DOT____Vcellout__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__out_src2_data,31,0);
VL_SIG(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__genblk2__BRA__3__KET____DOT__VX_Context_one__DOT____Vcellout__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__out_src1_data,31,0);
VL_SIG(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__genblk2__BRA__3__KET____DOT__VX_Context_one__DOT____Vcellout__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__out_src2_data,31,0);
VL_SIG(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__genblk2__BRA__3__KET____DOT__VX_Context_one__DOT____Vcellout__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__out_src1_data,31,0);
VL_SIG(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__genblk2__BRA__3__KET____DOT__VX_Context_one__DOT____Vcellout__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__out_src2_data,31,0);
VL_SIG(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__genblk2__BRA__3__KET____DOT__VX_Context_one__DOT____Vcellout__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__out_src1_data,31,0);
VL_SIG(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__genblk2__BRA__4__KET____DOT__VX_Context_one__DOT____Vcellout__vx_register_file_master__out_src2_data,31,0);
VL_SIG(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__genblk2__BRA__4__KET____DOT__VX_Context_one__DOT____Vcellout__vx_register_file_master__out_src1_data,31,0);
VL_SIG(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__genblk2__BRA__4__KET____DOT__VX_Context_one__DOT____Vcellout__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__out_src2_data,31,0);
VL_SIG(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__genblk2__BRA__4__KET____DOT__VX_Context_one__DOT____Vcellout__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__out_src1_data,31,0);
VL_SIG(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__genblk2__BRA__4__KET____DOT__VX_Context_one__DOT____Vcellout__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__out_src2_data,31,0);
VL_SIG(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__genblk2__BRA__4__KET____DOT__VX_Context_one__DOT____Vcellout__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__out_src1_data,31,0);
VL_SIG(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__genblk2__BRA__4__KET____DOT__VX_Context_one__DOT____Vcellout__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__out_src2_data,31,0);
VL_SIG(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__genblk2__BRA__4__KET____DOT__VX_Context_one__DOT____Vcellout__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__out_src1_data,31,0);
VL_SIG(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__genblk2__BRA__5__KET____DOT__VX_Context_one__DOT____Vcellout__vx_register_file_master__out_src2_data,31,0);
};
struct {
VL_SIG(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__genblk2__BRA__5__KET____DOT__VX_Context_one__DOT____Vcellout__vx_register_file_master__out_src1_data,31,0);
VL_SIG(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__genblk2__BRA__5__KET____DOT__VX_Context_one__DOT____Vcellout__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__out_src2_data,31,0);
VL_SIG(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__genblk2__BRA__5__KET____DOT__VX_Context_one__DOT____Vcellout__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__out_src1_data,31,0);
VL_SIG(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__genblk2__BRA__5__KET____DOT__VX_Context_one__DOT____Vcellout__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__out_src2_data,31,0);
VL_SIG(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__genblk2__BRA__5__KET____DOT__VX_Context_one__DOT____Vcellout__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__out_src1_data,31,0);
VL_SIG(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__genblk2__BRA__5__KET____DOT__VX_Context_one__DOT____Vcellout__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__out_src2_data,31,0);
VL_SIG(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__genblk2__BRA__5__KET____DOT__VX_Context_one__DOT____Vcellout__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__out_src1_data,31,0);
VL_SIG(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__genblk2__BRA__6__KET____DOT__VX_Context_one__DOT____Vcellout__vx_register_file_master__out_src2_data,31,0);
VL_SIG(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__genblk2__BRA__6__KET____DOT__VX_Context_one__DOT____Vcellout__vx_register_file_master__out_src1_data,31,0);
VL_SIG(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__genblk2__BRA__6__KET____DOT__VX_Context_one__DOT____Vcellout__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__out_src2_data,31,0);
VL_SIG(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__genblk2__BRA__6__KET____DOT__VX_Context_one__DOT____Vcellout__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__out_src1_data,31,0);
VL_SIG(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__genblk2__BRA__6__KET____DOT__VX_Context_one__DOT____Vcellout__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__out_src2_data,31,0);
VL_SIG(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__genblk2__BRA__6__KET____DOT__VX_Context_one__DOT____Vcellout__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__out_src1_data,31,0);
VL_SIG(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__genblk2__BRA__6__KET____DOT__VX_Context_one__DOT____Vcellout__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__out_src2_data,31,0);
VL_SIG(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__genblk2__BRA__6__KET____DOT__VX_Context_one__DOT____Vcellout__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__out_src1_data,31,0);
VL_SIG(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__genblk2__BRA__7__KET____DOT__VX_Context_one__DOT____Vcellout__vx_register_file_master__out_src2_data,31,0);
VL_SIG(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__genblk2__BRA__7__KET____DOT__VX_Context_one__DOT____Vcellout__vx_register_file_master__out_src1_data,31,0);
VL_SIG(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__genblk2__BRA__7__KET____DOT__VX_Context_one__DOT____Vcellout__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__out_src2_data,31,0);
VL_SIG(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__genblk2__BRA__7__KET____DOT__VX_Context_one__DOT____Vcellout__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__out_src1_data,31,0);
VL_SIG(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__genblk2__BRA__7__KET____DOT__VX_Context_one__DOT____Vcellout__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__out_src2_data,31,0);
VL_SIG(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__genblk2__BRA__7__KET____DOT__VX_Context_one__DOT____Vcellout__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__out_src1_data,31,0);
VL_SIG(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__genblk2__BRA__7__KET____DOT__VX_Context_one__DOT____Vcellout__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__out_src2_data,31,0);
VL_SIG(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT__genblk2__BRA__7__KET____DOT__VX_Context_one__DOT____Vcellout__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__out_src1_data,31,0);
VL_SIGW(Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT____Vcellinp__d_e_reg__in,489,0,16);
VL_SIG(Vortex__DOT__vx_back_end__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__0__KET____DOT__vx_alu__out_alu_result,31,0);
VL_SIG(Vortex__DOT__vx_back_end__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__1__KET____DOT__vx_alu__out_alu_result,31,0);
VL_SIG(Vortex__DOT__vx_back_end__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__2__KET____DOT__vx_alu__out_alu_result,31,0);
VL_SIG(Vortex__DOT__vx_back_end__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__3__KET____DOT__vx_alu__out_alu_result,31,0);
VL_SIGW(Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in,463,0,15);
VL_SIG8(Vortex__DOT__vx_front_end__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__0__KET____DOT__VX_Warp__out_valid[4],0,0);
VL_SIG8(Vortex__DOT__vx_front_end__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__0__KET____DOT__VX_Warp__in_thread_mask[4],0,0);
VL_SIG8(Vortex__DOT__vx_front_end__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__1__KET____DOT__VX_Warp__out_valid[4],0,0);
VL_SIG8(Vortex__DOT__vx_front_end__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__1__KET____DOT__VX_Warp__in_thread_mask[4],0,0);
VL_SIG8(Vortex__DOT__vx_front_end__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__2__KET____DOT__VX_Warp__out_valid[4],0,0);
VL_SIG8(Vortex__DOT__vx_front_end__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__2__KET____DOT__VX_Warp__in_thread_mask[4],0,0);
VL_SIG8(Vortex__DOT__vx_front_end__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__3__KET____DOT__VX_Warp__out_valid[4],0,0);
VL_SIG8(Vortex__DOT__vx_front_end__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__3__KET____DOT__VX_Warp__in_thread_mask[4],0,0);
VL_SIG8(Vortex__DOT__vx_front_end__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__4__KET____DOT__VX_Warp__out_valid[4],0,0);
VL_SIG8(Vortex__DOT__vx_front_end__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__4__KET____DOT__VX_Warp__in_thread_mask[4],0,0);
VL_SIG8(Vortex__DOT__vx_front_end__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__5__KET____DOT__VX_Warp__out_valid[4],0,0);
VL_SIG8(Vortex__DOT__vx_front_end__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__5__KET____DOT__VX_Warp__in_thread_mask[4],0,0);
VL_SIG8(Vortex__DOT__vx_front_end__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__6__KET____DOT__VX_Warp__out_valid[4],0,0);
VL_SIG8(Vortex__DOT__vx_front_end__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__6__KET____DOT__VX_Warp__in_thread_mask[4],0,0);
VL_SIG8(Vortex__DOT__vx_front_end__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__7__KET____DOT__VX_Warp__out_valid[4],0,0);
VL_SIG8(Vortex__DOT__vx_front_end__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__7__KET____DOT__VX_Warp__in_thread_mask[4],0,0);
};
// Begin mtask footprint all:
VL_SIG8(__Vtableidx1,2,0);
VL_SIG8(__Vdly__Vortex__DOT__vx_front_end__DOT__vx_fetch__DOT__warp_num,3,0);
VL_SIG8(__Vclklast__TOP__clk,0,0);
VL_SIG8(__Vclklast__TOP__reset,0,0);
VL_SIG16(Vortex__DOT__vx_csr_handler__DOT____Vlvbound1,11,0);
VL_SIGW(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT____Vcellout__vx_grp_wrapper__out_b_reg_data,127,0,4);
VL_SIGW(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT____Vcellout__vx_grp_wrapper__out_a_reg_data,127,0,4);
VL_SIGW(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT____Vcellout__genblk2__BRA__0__KET____DOT__vx_gpr__out_b_reg_data,127,0,4);
VL_SIGW(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT____Vcellout__genblk2__BRA__0__KET____DOT__vx_gpr__out_a_reg_data,127,0,4);
VL_SIGW(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT____Vcellout__genblk2__BRA__7__KET____DOT__vx_gpr__out_b_reg_data,127,0,4);
VL_SIGW(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__vx_grp_wrapper__DOT____Vcellout__genblk2__BRA__7__KET____DOT__vx_gpr__out_a_reg_data,127,0,4);
VL_SIGW(Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT____Vcellinp__d_e_reg__in,489,0,16);
VL_SIG(Vortex__DOT__vx_back_end__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__0__KET____DOT__vx_alu__out_alu_result,31,0);
VL_SIG(Vortex__DOT__vx_back_end__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__1__KET____DOT__vx_alu__out_alu_result,31,0);
VL_SIG(Vortex__DOT__vx_back_end__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__2__KET____DOT__vx_alu__out_alu_result,31,0);
VL_SIG(Vortex__DOT__vx_back_end__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__3__KET____DOT__vx_alu__out_alu_result,31,0);
VL_SIGW(Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in,463,0,15);
VL_SIG8(Vortex__DOT__vx_front_end__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__0__KET____DOT__VX_Warp__out_valid[4],0,0);
VL_SIG8(Vortex__DOT__vx_front_end__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__0__KET____DOT__VX_Warp__in_thread_mask[4],0,0);
VL_SIG8(Vortex__DOT__vx_front_end__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__1__KET____DOT__VX_Warp__out_valid[4],0,0);
VL_SIG8(Vortex__DOT__vx_front_end__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__1__KET____DOT__VX_Warp__in_thread_mask[4],0,0);
VL_SIG8(Vortex__DOT__vx_front_end__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__2__KET____DOT__VX_Warp__out_valid[4],0,0);
VL_SIG8(Vortex__DOT__vx_front_end__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__2__KET____DOT__VX_Warp__in_thread_mask[4],0,0);
VL_SIG8(Vortex__DOT__vx_front_end__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__3__KET____DOT__VX_Warp__out_valid[4],0,0);
VL_SIG8(Vortex__DOT__vx_front_end__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__3__KET____DOT__VX_Warp__in_thread_mask[4],0,0);
VL_SIG8(Vortex__DOT__vx_front_end__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__4__KET____DOT__VX_Warp__out_valid[4],0,0);
VL_SIG8(Vortex__DOT__vx_front_end__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__4__KET____DOT__VX_Warp__in_thread_mask[4],0,0);
VL_SIG8(Vortex__DOT__vx_front_end__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__5__KET____DOT__VX_Warp__out_valid[4],0,0);
VL_SIG8(Vortex__DOT__vx_front_end__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__5__KET____DOT__VX_Warp__in_thread_mask[4],0,0);
VL_SIG8(Vortex__DOT__vx_front_end__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__6__KET____DOT__VX_Warp__out_valid[4],0,0);
VL_SIG8(Vortex__DOT__vx_front_end__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__6__KET____DOT__VX_Warp__in_thread_mask[4],0,0);
VL_SIG8(Vortex__DOT__vx_front_end__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__7__KET____DOT__VX_Warp__out_valid[4],0,0);
VL_SIG8(Vortex__DOT__vx_front_end__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__7__KET____DOT__VX_Warp__in_thread_mask[4],0,0);
static VL_ST_SIG8(__Vtable1_Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__mul_alu[8],4,0);
// INTERNAL VARIABLES
@@ -411,7 +260,7 @@ VL_MODULE(VVortex) {
static QData _change_request(VVortex__Syms* __restrict vlSymsp);
public:
static void _combo__TOP__11(VVortex__Syms* __restrict vlSymsp);
static void _combo__TOP__5(VVortex__Syms* __restrict vlSymsp);
static void _combo__TOP__4(VVortex__Syms* __restrict vlSymsp);
static void _combo__TOP__9(VVortex__Syms* __restrict vlSymsp);
private:
void _ctor_var_reset() VL_ATTR_COLD;
@@ -428,7 +277,7 @@ VL_MODULE(VVortex) {
static void _multiclk__TOP__10(VVortex__Syms* __restrict vlSymsp);
static void _multiclk__TOP__8(VVortex__Syms* __restrict vlSymsp);
static void _sequent__TOP__3(VVortex__Syms* __restrict vlSymsp);
static void _sequent__TOP__4(VVortex__Syms* __restrict vlSymsp);
static void _sequent__TOP__5(VVortex__Syms* __restrict vlSymsp);
static void _sequent__TOP__6(VVortex__Syms* __restrict vlSymsp);
static void _sequent__TOP__7(VVortex__Syms* __restrict vlSymsp);
static void _settle__TOP__2(VVortex__Syms* __restrict vlSymsp) VL_ATTR_COLD;

2
rtl/obj_dir/VVortex_VX_wb_inter.cpp
View File

@@ -30,7 +30,7 @@ VVortex_VX_wb_inter::~VVortex_VX_wb_inter() {
// Internal Methods
void VVortex_VX_wb_inter::_ctor_var_reset() {
VL_DEBUG_IF(VL_DBG_MSGF("+ VVortex_VX_wb_inter::_ctor_var_reset\n"); );
VL_DEBUG_IF(VL_DBG_MSGF("+ VVortex_VX_wb_inter::_ctor_var_reset\n"); );
// Body
VL_RAND_RESET_W(128,write_data);
}

BIN
rtl/obj_dir/VVortex__ALL.a
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Binary file not shown.

BIN
rtl/obj_dir/VVortex__ALLcls.o
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Binary file not shown.

2
rtl/obj_dir/VVortex__ver.d
View File

@@ -1 +1 @@
obj_dir/VVortex.cpp obj_dir/VVortex.h obj_dir/VVortex.mk obj_dir/VVortex_VX_branch_response_inter.cpp obj_dir/VVortex_VX_branch_response_inter.h obj_dir/VVortex_VX_dcache_request_inter.cpp obj_dir/VVortex_VX_dcache_request_inter.h obj_dir/VVortex_VX_dcache_response_inter.cpp obj_dir/VVortex_VX_dcache_response_inter.h obj_dir/VVortex_VX_frE_to_bckE_req_inter.cpp obj_dir/VVortex_VX_frE_to_bckE_req_inter.h obj_dir/VVortex_VX_inst_mem_wb_inter.cpp obj_dir/VVortex_VX_inst_mem_wb_inter.h obj_dir/VVortex_VX_inst_meta_inter.cpp obj_dir/VVortex_VX_inst_meta_inter.h obj_dir/VVortex_VX_mem_req_inter.cpp obj_dir/VVortex_VX_mem_req_inter.h obj_dir/VVortex_VX_warp_ctl_inter.cpp obj_dir/VVortex_VX_warp_ctl_inter.h obj_dir/VVortex_VX_wb_inter.cpp obj_dir/VVortex_VX_wb_inter.h obj_dir/VVortex__Syms.cpp obj_dir/VVortex__Syms.h obj_dir/VVortex__ver.d obj_dir/VVortex_classes.mk : /usr/local/bin/verilator_bin /usr/local/bin/verilator_bin VX_alu.v VX_back_end.v VX_context.v VX_context_slave.v VX_csr_handler.v VX_decode.v VX_define.v VX_execute.v VX_fetch.v VX_forwarding.v VX_front_end.v VX_generic_register.v VX_gpr_wrapper.v VX_memory.v VX_register_file.v VX_register_file_master_slave.v VX_register_file_slave.v VX_warp.v VX_writeback.v Vortex.v interfaces//VX_branch_response_inter.v interfaces//VX_csr_write_request_inter.v interfaces//VX_dcache_request_inter.v interfaces//VX_dcache_response_inter.v interfaces//VX_forward_exe_inter.v interfaces//VX_forward_mem_inter.sv interfaces//VX_forward_reqeust_inter.v interfaces//VX_forward_response_inter.v interfaces//VX_forward_wb_inter.v interfaces//VX_frE_to_bckE_req_inter.v interfaces//VX_gpr_clone_inter.v interfaces//VX_gpr_jal_inter.v interfaces//VX_gpr_read_inter.sv interfaces//VX_gpr_wspawn_inter.v interfaces//VX_icache_request_inter.v interfaces//VX_icache_response_inter.v interfaces//VX_inst_mem_wb_inter.v interfaces//VX_inst_meta_inter.v interfaces//VX_jal_response_inter.v interfaces//VX_mem_req_inter.v interfaces//VX_mw_wb_inter.v interfaces//VX_warp_ctl_inter.v interfaces//VX_wb_inter.v pipe_regs//VX_d_e_reg.v pipe_regs//VX_e_m_reg.v pipe_regs//VX_f_d_reg.v pipe_regs//VX_m_w_reg.v
obj_dir/VVortex.cpp obj_dir/VVortex.h obj_dir/VVortex.mk obj_dir/VVortex_VX_branch_response_inter.cpp obj_dir/VVortex_VX_branch_response_inter.h obj_dir/VVortex_VX_dcache_request_inter.cpp obj_dir/VVortex_VX_dcache_request_inter.h obj_dir/VVortex_VX_dcache_response_inter.cpp obj_dir/VVortex_VX_dcache_response_inter.h obj_dir/VVortex_VX_frE_to_bckE_req_inter.cpp obj_dir/VVortex_VX_frE_to_bckE_req_inter.h obj_dir/VVortex_VX_inst_mem_wb_inter.cpp obj_dir/VVortex_VX_inst_mem_wb_inter.h obj_dir/VVortex_VX_inst_meta_inter.cpp obj_dir/VVortex_VX_inst_meta_inter.h obj_dir/VVortex_VX_mem_req_inter.cpp obj_dir/VVortex_VX_mem_req_inter.h obj_dir/VVortex_VX_warp_ctl_inter.cpp obj_dir/VVortex_VX_warp_ctl_inter.h obj_dir/VVortex_VX_wb_inter.cpp obj_dir/VVortex_VX_wb_inter.h obj_dir/VVortex__Syms.cpp obj_dir/VVortex__Syms.h obj_dir/VVortex__ver.d obj_dir/VVortex_classes.mk : /usr/local/bin/verilator_bin /usr/local/bin/verilator_bin VX_alu.v VX_back_end.v VX_csr_handler.v VX_decode.v VX_define.v VX_execute.v VX_fetch.v VX_forwarding.v VX_front_end.v VX_generic_register.v VX_gpr.v VX_gpr_wrapper.v VX_memory.v VX_warp.v VX_writeback.v Vortex.v interfaces//VX_branch_response_inter.v interfaces//VX_csr_write_request_inter.v interfaces//VX_dcache_request_inter.v interfaces//VX_dcache_response_inter.v interfaces//VX_forward_exe_inter.v interfaces//VX_forward_mem_inter.sv interfaces//VX_forward_reqeust_inter.v interfaces//VX_forward_response_inter.v interfaces//VX_forward_wb_inter.v interfaces//VX_frE_to_bckE_req_inter.v interfaces//VX_gpr_clone_inter.v interfaces//VX_gpr_jal_inter.v interfaces//VX_gpr_read_inter.sv interfaces//VX_gpr_wspawn_inter.v interfaces//VX_icache_request_inter.v interfaces//VX_icache_response_inter.v interfaces//VX_inst_mem_wb_inter.v interfaces//VX_inst_meta_inter.v interfaces//VX_jal_response_inter.v interfaces//VX_mem_req_inter.v interfaces//VX_mw_wb_inter.v interfaces//VX_warp_ctl_inter.v interfaces//VX_wb_inter.v pipe_regs//VX_d_e_reg.v pipe_regs//VX_e_m_reg.v pipe_regs//VX_f_d_reg.v pipe_regs//VX_m_w_reg.v

72
rtl/obj_dir/VVortex__verFiles.dat
View File

@@ -3,21 +3,17 @@ C "--compiler gcc -Wall -cc Vortex.v -Iinterfaces/ -Ipipe_regs/ --exe test_bench
S 6746612 12892413243 1567548409 0 1567548409 0 "/usr/local/bin/verilator_bin"
S 2785 1565236 1567474434 0 1567474434 0 "VX_alu.v"
S 2767 1703128 1567984522 0 1567984522 0 "VX_back_end.v"
S 3130 890783 1568051338 0 1568051338 0 "VX_context.v"
S 4891 890784 1568051394 0 1568051394 0 "VX_context_slave.v"
S 1837 1768199 1567984564 0 1567984564 0 "VX_csr_handler.v"
S 13386 890775 1568052206 0 1568052206 0 "VX_decode.v"
S 13387 891321 1568075916 0 1568075916 0 "VX_decode.v"
S 1676 1565244 1567474434 0 1567474434 0 "VX_define.v"
S 3835 1573272 1567973378 0 1567973378 0 "VX_execute.v"
S 3835 891130 1568052328 0 1568052328 0 "VX_execute.v"
S 6520 1598760 1567980382 0 1567980382 0 "VX_fetch.v"
S 6148 1701713 1567982096 0 1567982096 0 "VX_forwarding.v"
S 2719 1701603 1567981038 0 1567981038 0 "VX_front_end.v"
S 399 1565278 1567537322 0 1567537322 0 "VX_generic_register.v"
S 3369 890722 1568052140 0 1568052140 0 "VX_gpr_wrapper.v"
S 1147 891129 1568081586 0 1568081586 0 "VX_gpr.v"
S 4212 891132 1568081646 0 1568081646 0 "VX_gpr_wrapper.v"
S 2584 1768087 1567983338 0 1567983338 0 "VX_memory.v"
S 1249 1572596 1567702894 0 1567702894 0 "VX_register_file.v"
S 1655 1572598 1567702916 0 1567702916 0 "VX_register_file_master_slave.v"
S 1599 1572597 1567702888 0 1567702888 0 "VX_register_file_slave.v"
S 1915 1565256 1567474434 0 1567474434 0 "VX_warp.v"
S 1597 1704649 1567981924 0 1567981924 0 "VX_writeback.v"
S 4392 1703129 1567985238 0 1567985238 0 "Vortex.v"
@@ -31,10 +27,10 @@ S 377 1582724 1567978250 0 1567978250 0 "interfaces
S 520 1573373 1567970758 0 1567970758 0 "interfaces//VX_forward_response_inter.v"
S 595 1573167 1567968126 0 1567968126 0 "interfaces//VX_forward_wb_inter.v"
S 1689 1571958 1567565366 0 1567565366 0 "interfaces//VX_frE_to_bckE_req_inter.v"
S 281 890852 1568051756 0 1568051756 0 "interfaces//VX_gpr_clone_inter.v"
S 258 890721 1568051502 0 1568051502 0 "interfaces//VX_gpr_jal_inter.v"
S 298 890642 1568050686 0 1568050686 0 "interfaces//VX_gpr_read_inter.sv"
S 328 890877 1568052200 0 1568052200 0 "interfaces//VX_gpr_wspawn_inter.v"
S 345 891319 1568075890 0 1568075890 0 "interfaces//VX_gpr_clone_inter.v"
S 256 891318 1568075982 0 1568075982 0 "interfaces//VX_gpr_jal_inter.v"
S 168 891192 1568075672 0 1568075672 0 "interfaces//VX_gpr_read_inter.sv"
S 392 891320 1568075898 0 1568075898 0 "interfaces//VX_gpr_wspawn_inter.v"
S 279 1578590 1567975102 0 1567975102 0 "interfaces//VX_icache_request_inter.v"
S 315 1578593 1567975152 0 1567975152 0 "interfaces//VX_icache_response_inter.v"
S 679 1573336 1567972210 0 1567972210 0 "interfaces//VX_inst_mem_wb_inter.v"
@@ -44,32 +40,32 @@ S 995 1572568 1567701364 0 1567701364 0 "interfaces
S 654 1573355 1567969270 0 1567969270 0 "interfaces//VX_mw_wb_inter.v"
S 603 1571976 1567568452 0 1567568452 0 "interfaces//VX_warp_ctl_inter.v"
S 459 890638 1568049504 0 1568049504 0 "interfaces//VX_wb_inter.v"
T 1268581 890659 1568052208 0 1568052208 0 "obj_dir/VVortex.cpp"
T 47834 890653 1568052208 0 1568052208 0 "obj_dir/VVortex.h"
T 1791 890788 1568052208 0 1568052208 0 "obj_dir/VVortex.mk"
T 914 890758 1568052208 0 1568052208 0 "obj_dir/VVortex_VX_branch_response_inter.cpp"
T 1029 890757 1568052208 0 1568052208 0 "obj_dir/VVortex_VX_branch_response_inter.h"
T 1210 890754 1568052208 0 1568052208 0 "obj_dir/VVortex_VX_dcache_request_inter.cpp"
T 1135 890753 1568052208 0 1568052208 0 "obj_dir/VVortex_VX_dcache_request_inter.h"
T 988 890752 1568052208 0 1568052208 0 "obj_dir/VVortex_VX_dcache_response_inter.cpp"
T 1045 890751 1568052208 0 1568052208 0 "obj_dir/VVortex_VX_dcache_response_inter.h"
T 1059 890756 1568052208 0 1568052208 0 "obj_dir/VVortex_VX_frE_to_bckE_req_inter.cpp"
T 1142 890755 1568052208 0 1568052208 0 "obj_dir/VVortex_VX_frE_to_bckE_req_inter.h"
T 884 890786 1568052208 0 1568052208 0 "obj_dir/VVortex_VX_inst_mem_wb_inter.cpp"
T 1008 890780 1568052208 0 1568052208 0 "obj_dir/VVortex_VX_inst_mem_wb_inter.h"
T 865 890767 1568052208 0 1568052208 0 "obj_dir/VVortex_VX_inst_meta_inter.cpp"
T 987 890763 1568052208 0 1568052208 0 "obj_dir/VVortex_VX_inst_meta_inter.h"
T 885 890769 1568052208 0 1568052208 0 "obj_dir/VVortex_VX_mem_req_inter.cpp"
T 1005 890768 1568052208 0 1568052208 0 "obj_dir/VVortex_VX_mem_req_inter.h"
T 902 890762 1568052208 0 1568052208 0 "obj_dir/VVortex_VX_warp_ctl_inter.cpp"
T 1017 890761 1568052208 0 1568052208 0 "obj_dir/VVortex_VX_warp_ctl_inter.h"
T 823 890760 1568052208 0 1568052208 0 "obj_dir/VVortex_VX_wb_inter.cpp"
T 954 890759 1568052208 0 1568052208 0 "obj_dir/VVortex_VX_wb_inter.h"
T 3499 890648 1568052208 0 1568052208 0 "obj_dir/VVortex__Syms.cpp"
T 1855 890647 1568052208 0 1568052208 0 "obj_dir/VVortex__Syms.h"
T 2151 890789 1568052208 0 1568052208 0 "obj_dir/VVortex__ver.d"
T 0 0 1568052208 0 1568052208 0 "obj_dir/VVortex__verFiles.dat"
T 1530 890787 1568052208 0 1568052208 0 "obj_dir/VVortex_classes.mk"
T 664405 891161 1568081662 0 1568081662 0 "obj_dir/VVortex.cpp"
T 21432 891159 1568081662 0 1568081662 0 "obj_dir/VVortex.h"
T 1791 891296 1568081662 0 1568081662 0 "obj_dir/VVortex.mk"
T 914 891284 1568081662 0 1568081662 0 "obj_dir/VVortex_VX_branch_response_inter.cpp"
T 1029 891283 1568081662 0 1568081662 0 "obj_dir/VVortex_VX_branch_response_inter.h"
T 1210 891176 1568081662 0 1568081662 0 "obj_dir/VVortex_VX_dcache_request_inter.cpp"
T 1135 891173 1568081662 0 1568081662 0 "obj_dir/VVortex_VX_dcache_request_inter.h"
T 988 891156 1568081662 0 1568081662 0 "obj_dir/VVortex_VX_dcache_response_inter.cpp"
T 1045 891154 1568081662 0 1568081662 0 "obj_dir/VVortex_VX_dcache_response_inter.h"
T 1059 891282 1568081662 0 1568081662 0 "obj_dir/VVortex_VX_frE_to_bckE_req_inter.cpp"
T 1142 891185 1568081662 0 1568081662 0 "obj_dir/VVortex_VX_frE_to_bckE_req_inter.h"
T 884 891292 1568081662 0 1568081662 0 "obj_dir/VVortex_VX_inst_mem_wb_inter.cpp"
T 1008 891291 1568081662 0 1568081662 0 "obj_dir/VVortex_VX_inst_mem_wb_inter.h"
T 865 891288 1568081662 0 1568081662 0 "obj_dir/VVortex_VX_inst_meta_inter.cpp"
T 987 891287 1568081662 0 1568081662 0 "obj_dir/VVortex_VX_inst_meta_inter.h"
T 885 891290 1568081662 0 1568081662 0 "obj_dir/VVortex_VX_mem_req_inter.cpp"
T 1005 891289 1568081662 0 1568081662 0 "obj_dir/VVortex_VX_mem_req_inter.h"
T 902 891286 1568081662 0 1568081662 0 "obj_dir/VVortex_VX_warp_ctl_inter.cpp"
T 1017 891285 1568081662 0 1568081662 0 "obj_dir/VVortex_VX_warp_ctl_inter.h"
T 825 891294 1568081662 0 1568081662 0 "obj_dir/VVortex_VX_wb_inter.cpp"
T 954 891293 1568081662 0 1568081662 0 "obj_dir/VVortex_VX_wb_inter.h"
T 3499 891142 1568081662 0 1568081662 0 "obj_dir/VVortex__Syms.cpp"
T 1855 891137 1568081662 0 1568081662 0 "obj_dir/VVortex__Syms.h"
T 2052 891297 1568081662 0 1568081662 0 "obj_dir/VVortex__ver.d"
T 0 0 1568081662 0 1568081662 0 "obj_dir/VVortex__verFiles.dat"
T 1530 891295 1568081662 0 1568081662 0 "obj_dir/VVortex_classes.mk"
S 6179 1572602 1567698562 0 1567698562 0 "pipe_regs//VX_d_e_reg.v"
S 1538 1573254 1567973402 0 1567973402 0 "pipe_regs//VX_e_m_reg.v"
S 755 1591921 1567978394 0 1567978394 0 "pipe_regs//VX_f_d_reg.v"

BIN
rtl/obj_dir/test_bench.o
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8
rtl/results.txt
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@@ -1,7 +1,7 @@
# Dynamic Instructions: 173969
# of total cycles: 175806
# Dynamic Instructions: 47217
# of total cycles: 47224
# of forwarding stalls: 0
# of branch stalls: 0
# CPI: 1.01056
# time to simulate: 2.15982e-314 milliseconds
# CPI: 1.00015
# time to simulate: 2.17e-314 milliseconds
# GRADE: Failed on test: 4294967295