cache pipeline optimization - moved tag access to stage0

This commit is contained in:
Blaise Tine
2021-01-03 23:10:41 -05:00
parent 9cef1aae04
commit 4d55118545
5 changed files with 251 additions and 361 deletions

View File

@@ -192,15 +192,13 @@
"afu/vortex/l3cache/bank, afu/vortex/cluster/l2cache/bank, afu/vortex/cluster/core/mem_unit/dcache/bank, afu/vortex/cluster/core/mem_unit/icache/bank, afu/vortex/cluster/core/mem_unit/smem/bank": {
"?valid_st0": 1,
"?valid_st1": 1,
"?valid_st2": 1,
"addr_st0": 32,
"addr_st1": 32,
"addr_st2": 32,
"is_fill_st0": 1,
"is_mshr_st0": 1,
"miss_st1": 1,
"force_miss_st1": 1,
"dirty_st1": 1,
"miss_st0": 1,
"force_miss_st0": 1,
"dirty_st0": 1,
"mshr_push": 1,
"?pipeline_stall": 1
}