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SCOPE update

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This commit is contained in:
Blaise Tine
2020-09-05 10:52:59 -07:00
parent a81418be88
commit 49b86c4b2a
46 changed files with 587 additions and 403 deletions
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4
hw/rtl/interfaces/VX_alu_req_if.v
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@@ -8,8 +8,8 @@ interface VX_alu_req_if ();
wire valid;
wire [`NW_BITS-1:0] wid;
wire [`NUM_THREADS-1:0] thread_mask;
wire [31:0] curr_PC;
wire [`NUM_THREADS-1:0] tmask;
wire [31:0] PC;
wire [31:0] next_PC;
wire [`ALU_BR_BITS-1:0] op_type;
wire is_br_op;

4
hw/rtl/interfaces/VX_csr_req_if.v
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@@ -8,8 +8,8 @@ interface VX_csr_req_if ();
wire valid;
wire [`NW_BITS-1:0] wid;
wire [`NUM_THREADS-1:0] thread_mask;
wire [31:0] curr_PC;
wire [`NUM_THREADS-1:0] tmask;
wire [31:0] PC;
wire [`CSR_BITS-1:0] op_type;
wire [`CSR_ADDR_BITS-1:0] csr_addr;
wire [31:0] csr_mask;

4
hw/rtl/interfaces/VX_decode_if.v
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@@ -8,8 +8,8 @@ interface VX_decode_if ();
wire valid;
wire [`NW_BITS-1:0] wid;
wire [`NUM_THREADS-1:0] thread_mask;
wire [31:0] curr_PC;
wire [`NUM_THREADS-1:0] tmask;
wire [31:0] PC;
wire [`EX_BITS-1:0] ex_type;
wire [`OP_BITS-1:0] op_type;

4
hw/rtl/interfaces/VX_exu_to_cmt_if.v
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@@ -7,8 +7,8 @@ interface VX_exu_to_cmt_if ();
wire valid;
wire [`NW_BITS-1:0] wid;
wire [`NUM_THREADS-1:0] thread_mask;
wire [31:0] curr_PC;
wire [`NUM_THREADS-1:0] tmask;
wire [31:0] PC;
wire [`NUM_THREADS-1:0][31:0] data;
wire [`NR_BITS-1:0] rd;
wire wb;

4
hw/rtl/interfaces/VX_fpu_req_if.v
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@@ -12,8 +12,8 @@ interface VX_fpu_req_if ();
wire valid;
wire [`NW_BITS-1:0] wid;
wire [`NUM_THREADS-1:0] thread_mask;
wire [31:0] curr_PC;
wire [`NUM_THREADS-1:0] tmask;
wire [31:0] PC;
wire [`FPU_BITS-1:0] op_type;
wire [`FRM_BITS-1:0] frm;
wire [`NUM_THREADS-1:0][31:0] rs1_data;

4
hw/rtl/interfaces/VX_fpu_to_cmt_if.v
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@@ -7,8 +7,8 @@ interface VX_fpu_to_cmt_if ();
wire valid;
wire [`NW_BITS-1:0] wid;
wire [`NUM_THREADS-1:0] thread_mask;
wire [31:0] curr_PC;
wire [`NUM_THREADS-1:0] tmask;
wire [31:0] PC;
wire [`NUM_THREADS-1:0][31:0] data;
wire [`NR_BITS-1:0] rd;
wire wb;

27
hw/rtl/interfaces/VX_gpr_read_if.v
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@@ -1,27 +0,0 @@
`ifndef VX_GPR_READ_IF
`define VX_GPR_READ_IF
`include "VX_define.vh"
interface VX_gpr_read_if ();
wire valid;
wire [`NW_BITS-1:0] wid;
wire [`NR_BITS-1:0] rs1;
wire [`NR_BITS-1:0] rs2;
wire [`NR_BITS-1:0] rs3;
wire use_rs3;
wire [`NUM_THREADS-1:0][31:0] rs1_data;
wire [`NUM_THREADS-1:0][31:0] rs2_data;
wire [`NUM_THREADS-1:0][31:0] rs3_data;
wire ready_in;
wire ready_out;
endinterface
`endif

21
hw/rtl/interfaces/VX_gpr_req_if.v Normal file
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@@ -0,0 +1,21 @@
`ifndef VX_GPR_REQ_IF
`define VX_GPR_REQ_IF
`include "VX_define.vh"
interface VX_gpr_req_if ();
wire valid;
wire [`NW_BITS-1:0] wid;
wire [31:0] PC;
wire [`NR_BITS-1:0] rs1;
wire [`NR_BITS-1:0] rs2;
wire [`NR_BITS-1:0] rs3;
wire use_rs3;
wire ready;
endinterface
`endif

21
hw/rtl/interfaces/VX_gpr_rsp_if.v Normal file
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@@ -0,0 +1,21 @@
`ifndef VX_GPR_RSP_IF
`define VX_GPR_RSP_IF
`include "VX_define.vh"
interface VX_gpr_rsp_if ();
wire valid;
`IGNORE_WARNINGS_BEGIN
wire [`NW_BITS-1:0] wid;
wire [31:0] PC;
`IGNORE_WARNINGS_END
wire [`NUM_THREADS-1:0][31:0] rs1_data;
wire [`NUM_THREADS-1:0][31:0] rs2_data;
wire [`NUM_THREADS-1:0][31:0] rs3_data;
wire ready;
endinterface
`endif

4
hw/rtl/interfaces/VX_gpu_req_if.v
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@@ -8,8 +8,8 @@ interface VX_gpu_req_if();
wire valid;
wire [`NW_BITS-1:0] wid;
wire [`NUM_THREADS-1:0] thread_mask;
wire [31:0] curr_PC;
wire [`NUM_THREADS-1:0] tmask;
wire [31:0] PC;
wire [31:0] next_PC;
wire [`GPU_BITS-1:0] op_type;
wire [`NUM_THREADS-1:0][31:0] rs1_data;

4
hw/rtl/interfaces/VX_ifetch_req_if.v
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@@ -6,9 +6,9 @@
interface VX_ifetch_req_if ();
wire valid;
wire [`NUM_THREADS-1:0] thread_mask;
wire [`NUM_THREADS-1:0] tmask;
wire [`NW_BITS-1:0] wid;
wire [31:0] curr_PC;
wire [31:0] PC;
wire ready;
endinterface

4
hw/rtl/interfaces/VX_ifetch_rsp_if.v
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@@ -6,9 +6,9 @@
interface VX_ifetch_rsp_if ();
wire valid;
wire [`NUM_THREADS-1:0] thread_mask;
wire [`NUM_THREADS-1:0] tmask;
wire [`NW_BITS-1:0] wid;
wire [31:0] curr_PC;
wire [31:0] PC;
wire [31:0] instr;
wire ready;

4
hw/rtl/interfaces/VX_lsu_req_if.v
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@@ -8,8 +8,8 @@ interface VX_lsu_req_if ();
wire valid;
wire [`NW_BITS-1:0] wid;
wire [`NUM_THREADS-1:0] thread_mask;
wire [31:0] curr_PC;
wire [`NUM_THREADS-1:0] tmask;
wire [31:0] PC;
wire rw;
wire [`BYTEEN_BITS-1:0] byteen;

4
hw/rtl/interfaces/VX_mul_req_if.v
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@@ -12,8 +12,8 @@ interface VX_mul_req_if ();
wire valid;
wire [`NW_BITS-1:0] wid;
wire [`NUM_THREADS-1:0] thread_mask;
wire [31:0] curr_PC;
wire [`NUM_THREADS-1:0] tmask;
wire [31:0] PC;
wire [`MUL_BITS-1:0] op_type;
wire [`NUM_THREADS-1:0][31:0] rs1_data;
wire [`NUM_THREADS-1:0][31:0] rs2_data;

4
hw/rtl/interfaces/VX_writeback_if.v
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@@ -6,11 +6,11 @@
interface VX_writeback_if ();
wire valid;
wire [`NUM_THREADS-1:0] thread_mask;
wire [`NUM_THREADS-1:0] tmask;
wire [`NW_BITS-1:0] wid;
`IGNORE_WARNINGS_BEGIN
wire [31:0] curr_PC;
wire [31:0] PC;
`IGNORE_WARNINGS_END
wire [`NR_BITS-1:0] rd;