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MULTICORE WITH L2 WORKING

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This commit is contained in:
felsabbagh3
2020-03-09 01:17:11 -07:00
parent 24f20a2da4
commit 469334f23e
28 changed files with 642 additions and 557 deletions
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4
rtl/interfaces/VX_gpu_dcache_dram_res_inter.v
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@@ -13,8 +13,8 @@ interface VX_gpu_dcache_dram_res_inter
)
();
// DRAM Rsponse
wire dram_fill_rsp;
wire [31:0] dram_fill_rsp_addr;
wire dram_fill_rsp;
wire [31:0] dram_fill_rsp_addr;
wire [BANK_LINE_SIZE_WORDS-1:0][31:0] dram_fill_rsp_data;
endinterface

6
rtl/interfaces/VX_gpu_dcache_req_inter.v
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@@ -16,10 +16,10 @@ interface VX_gpu_dcache_req_inter
wire [NUMBER_REQUESTS-1:0] core_req_valid;
wire [NUMBER_REQUESTS-1:0][31:0] core_req_addr;
wire [NUMBER_REQUESTS-1:0][31:0] core_req_writedata;
wire [2:0] core_req_mem_read;
wire [2:0] core_req_mem_write;
wire [NUMBER_REQUESTS-1:0][2:0] core_req_mem_read;
wire [NUMBER_REQUESTS-1:0][2:0] core_req_mem_write;
wire [4:0] core_req_rd;
wire [1:0] core_req_wb;
wire [NUMBER_REQUESTS-1:0][1:0] core_req_wb;
wire [`NW_M1:0] core_req_warp_num;
wire [31:0] core_req_pc;