tensor: Doc comments
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@@ -97,8 +97,8 @@ module VX_tensor_dpu #(
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);
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// Split A_tile and C_tile by rows (0-1, 2-3) and parallelize in two
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// threadgroups; B_tile is shared across the two threadgroups. See Figure
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// 13 in paper
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// threadgroup DPUs; B_tile is shared across the two threadgroups. See
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// Figure 13 in paper
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VX_tensor_threadgroup #(
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) threadgroup_0 (
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.clk (clk),
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@@ -196,7 +196,8 @@ module VX_tensor_threadgroup #(
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// + C_frag. substep_in and substep_out keeps track of which cycle they're at
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// & when they have to pop from input queue and push to result queue.
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// Note that substep is different from the "step" defined in the HMMA
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// instruction set; it is a purely microarchitectural construct.
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// instruction set; it is similar in meaning to the substeps in
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// VX_tensor_octet.
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//
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// substep_in == 0: FEDP uses first half from operand buffer
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// substep_in == 1: FEDP uses last half and pops from operand buffer
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@@ -270,12 +271,21 @@ module VX_tensor_threadgroup #(
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for (genvar i = 0; i < 4; ++i) begin
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// at substep == 0, the 0th and 2nd columns of D begins compute;
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// at substep == 1, the 1st and 3rd columns of D begins compute.
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// there are two row elements for each column, rounding out
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// 4 elements being computed by 4 FEDPs at every cycle
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// There are two row elements for each column, rounding out to
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// 4 elements computed by 4 FEDPs at every cycle
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// (see Figure 10(b)).
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// d_row: 0, 0, 1, 1
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// d_col: 0, 2, 0, 2
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// i : 0, 1, 2, 3
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// d_row : 0, 0, 1, 1
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// d_col : 0, 2, 0, 2
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// d_col_sel: 1, 3, 1, 3
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//
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// substep 0:
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// [ 0 x 2 x ]
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// [ 1 x 3 x ]
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// substep 1:
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// [ x 0 x 2 ]
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// [ x 1 x 3 ]
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localparam int d_row = i / 2;
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localparam int d_col = (i % 2) * 2;
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wire [31:0] d_col_sel = (substep_in == 1'b0) ? d_col : (d_col + 1);
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