minor update

2021-03-22 10:48:26 -04:00
parent a6c489b553
commit 40e3e0105a
2 changed files with 3 additions and 3 deletions
--- a/hw/rtl/tex_unit/VX_tex_unit.v
+++ b/hw/rtl/tex_unit/VX_tex_unit.v
@@ -89,9 +89,9 @@ module VX_tex_unit #(
    wire [REQ_INFO_WIDTH_M-1:0] mem_rsp_info;
    wire mem_rsp_ready;
                
-    VX_tex_addr_gen #(
+    VX_tex_addr #(
        .REQ_INFO_WIDTH (REQ_INFO_WIDTH_A)
-    ) tex_addr_gen (
+    ) tex_addr (
        .clk            (clk),
        .reset          (reset),