added assert_equal to read/write test
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12
hw/unit_tests/cache/testbench.cpp
vendored
12
hw/unit_tests/cache/testbench.cpp
vendored
@@ -24,7 +24,6 @@ int main(int argc, char **argv)
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RAM ram;
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CacheSim cachesim;
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cachesim.attach_ram(&ram);
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cachesim.reset();
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unsigned int addr[4] = {0x12222222, 0xabbbbbbb, 0xcddddddd, 0xe4444444};
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unsigned int data[4] = {0xffffffff, 0x11111111, 0x22222222, 0x33333333};
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@@ -47,14 +46,21 @@ int main(int argc, char **argv)
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read->addr = addr;
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read->data = addr;
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read->tag = 0xff;
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// reset the device
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cachesim.reset();
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//queue reqs
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cachesim.send_req(write);
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cachesim.send_req(read);
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cachesim.run();
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for(int i = 0; i < 100; ++i){
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cachesim.step();
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bool check = cachesim.assert_equal(data, write->tag);
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if(check){
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std::cout << "PASSED" << std::endl;
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} else {
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std::cout << "FAILED" << std::endl;
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}
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return 0;
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