Passes all tests except MEM and lui?

This commit is contained in:
felsabbagh3
2019-02-10 05:46:18 -05:00
parent 0c3a73a896
commit 3c74a13009
169 changed files with 26599 additions and 443 deletions

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@@ -26,21 +26,21 @@ namespace Harp {
nThds = 1;
nWarps = 1;
extent = EXT_REGS;
if (!iss) { extent = EXT_NULL; return; }
iss >> encChar;
if (!iss) { extent = EXT_WORDSIZE; return; }
iss >> nRegs;
if (!iss) { extent = EXT_ENC; return; }
char sep;
iss >> sep >> nPRegs;
if (!iss || sep != '/') { extent = EXT_REGS; return; }
iss >> sep >> nThds;
if (!iss || sep != '/') { extent = EXT_PREGS; return; }
iss >> sep >> nWarps;
if (!iss || sep != '/') { extent = EXT_THDS; return; }
extent = EXT_WARPS;
// if (!iss) { extent = EXT_NULL; return; }
// iss >> encChar;
// if (!iss) { extent = EXT_WORDSIZE; return; }
// iss >> nRegs;
// if (!iss) { extent = EXT_ENC; return; }
// char sep;
// iss >> sep >> nPRegs;
// if (!iss || sep != '/') { extent = EXT_REGS; return; }
// iss >> sep >> nThds;
// if (!iss || sep != '/') { extent = EXT_PREGS; return; }
// iss >> sep >> nWarps;
// if (!iss || sep != '/') { extent = EXT_THDS; return; }
// extent = EXT_WARPS;
}
operator std::string () const {

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@@ -27,7 +27,7 @@ namespace Harp {
Reg(): cpuId(0), regNum(0), val(0) {}
Reg(Word c, Word n): cpuId(c), regNum(n), val(0) {}
Reg &operator=(T r) { val = r; doWrite(); return *this; }
Reg &operator=(T r) { if (regNum) {val = r; doWrite();} return *this; }
operator T() const { doRead(); return val; }
@@ -120,6 +120,7 @@ namespace Harp {
Size activeThreads, shadowActiveThreads;
std::vector<std::vector<Reg<Word> > > reg;
std::vector<std::vector<Reg<bool> > > pred;
std::vector<Reg<uint16_t> > csr;
std::vector<bool> tmask, shadowTmask;
std::stack<DomStackEntry> domStack;

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@@ -4,6 +4,8 @@
#ifndef __DEBUG_H
#define __DEBUG_H
// #define USE_DEBUG 9
#ifdef USE_DEBUG
#include <iostream>

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@@ -13,6 +13,50 @@ namespace Harp {
class Warp;
class Ref;
enum Opcode
{
NOP = 0,
R_INST = 51,
L_INST = 3,
I_INST = 19,
S_INST = 35,
B_INST = 99,
LUI_INST = 55,
AUIPC_INST = 23,
JAL_INST = 111,
JALR_INST = 103,
SYS_INST = 115,
TRAP = 0x7f,
FENCE = 0x0f
};
enum InstType { N_TYPE, R_TYPE, I_TYPE, S_TYPE, B_TYPE, U_TYPE, J_TYPE};
// We build a table of instruction information out of this.
struct InstTableEntry_t {
const char *opString;
bool controlFlow, relAddress, allSrcArgs, privileged;
InstType iType;
};
static std::map<int, struct InstTableEntry_t> instTable =
{
{Opcode::NOP, {"nop" , false, false, false, false, InstType::N_TYPE }},
{Opcode::R_INST, {"r_type", false, false, false, false, InstType::R_TYPE }},
{Opcode::L_INST, {"load" , false, false, false, false, InstType::I_TYPE }},
{Opcode::I_INST, {"i_type", false, false, false, false, InstType::I_TYPE }},
{Opcode::S_INST, {"store" , false, false, false, false, InstType::I_TYPE }},
{Opcode::B_INST, {"branch", true , false, false, false, InstType::B_TYPE }},
{Opcode::LUI_INST, {"lui" , false, false, false, false, InstType::U_TYPE }},
{Opcode::AUIPC_INST, {"auipc" , false, false, false, false, InstType::U_TYPE }},
{Opcode::JAL_INST, {"jal" , true , false, false, false, InstType::J_TYPE }},
{Opcode::JALR_INST, {"jalr" , true , false, false, false, InstType::I_TYPE }},
{Opcode::SYS_INST, {"SYS" , true , false, false, false, InstType::I_TYPE }},
{Opcode::TRAP, {"TRAP" , true , false, false, false, InstType::I_TYPE }},
{Opcode::FENCE, {"fence" , true , false, false, false, InstType::I_TYPE }}
};
static const Size MAX_REG_SOURCES(3);
static const Size MAX_PRED_SOURCES(2);
@@ -25,51 +69,10 @@ namespace Harp {
class Instruction {
public:
enum Opcode
{
NOP = 0,
R_INST = 51,
L_INST = 3,
I_INST = 19,
S_INST = 35,
B_INST = 99,
LUI_INST = 55,
AUIPC_INST = 23,
JAL_INST = 111,
JALR_INST = 103,
SYS_INST = 115
};
enum InstType { N_TYPE, R_TYPE, I_TYPE, S_TYPE, B_TYPE, U_TYPE, J_TYPE };
// We build a table of instruction information out of this.
struct InstTableEntry_t {
const char *opString;
bool controlFlow, relAddress, allSrcArgs, privileged;
InstType iType;
};
Instruction() :
predicated(false), nRsrc(0), nPsrc(0), immsrcPresent(false),
rdestPresent(false), pdestPresent(false), refLiteral(NULL)
{
instTable = std::map<int, struct InstTableEntry_t>
{
{Opcode::NOP, {"nop" , false, false, false, false, InstType::N_TYPE }},
{Opcode::R_INST, {"r_type", false, false, false, false, InstType::R_TYPE }},
{Opcode::L_INST, {"load" , false, false, false, false, InstType::I_TYPE }},
{Opcode::I_INST, {"i_type", false, false, false, false, InstType::I_TYPE }},
{Opcode::S_INST, {"store" , false, false, false, false, InstType::I_TYPE }},
{Opcode::B_INST, {"branch", true , false, false, false, InstType::B_TYPE }},
{Opcode::LUI_INST, {"lui" , false, false, false, false, InstType::U_TYPE }},
{Opcode::AUIPC_INST, {"auipc" , false, false, false, false, InstType::U_TYPE }},
{Opcode::JAL_INST, {"jal" , true , false, false, false, InstType::J_TYPE }},
{Opcode::JALR_INST, {"jalr" , true , false, false, false, InstType::I_TYPE }},
{Opcode::SYS_INST, {"SYS" , true , false, false, false, InstType::I_TYPE }}
};
}
void executeOn(Warp &warp);
@@ -123,7 +126,7 @@ namespace Harp {
Ref *refLiteral;
public:
static std::map<int, struct InstTableEntry_t> instTable;
};
};

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@@ -124,7 +124,7 @@ namespace Harp {
Word read(Addr, bool sup); /* For data accesses. */
Word fetch(Addr, bool sup); /* For instruction accesses. */
Byte *getPtr(Addr, Size);
void write(Addr, Word, bool sup);
void write(Addr, Word, bool sup, Size);
void tlbAdd(Addr virt, Addr phys, Word flags);
void tlbRm(Addr va);
void tlbFlush() { tlb.clear(); }
@@ -166,6 +166,261 @@ namespace Harp {
bool disableVm;
};
class RAM : public MemDevice {
public:
uint8_t* mem[1 << 12];
RAM(){
for(uint32_t i = 0;i < (1 << 12);i++) mem[i] = NULL;
}
~RAM(){
for(uint32_t i = 0;i < (1 << 12);i++) if(mem[i]) delete [] mem[i];
}
void clear(){
for(uint32_t i = 0;i < (1 << 12);i++)
{
if(mem[i])
{
delete mem[i];
mem[i] = NULL;
}
}
}
uint8_t* get(uint32_t address){
if(mem[address >> 20] == NULL) {
uint8_t* ptr = new uint8_t[1024*1024];
for(uint32_t i = 0;i < 1024*1024;i+=4) {
ptr[i + 0] = 0xFF;
ptr[i + 1] = 0xFF;
ptr[i + 2] = 0xFF;
ptr[i + 3] = 0xFF;
}
mem[address >> 20] = ptr;
}
return &mem[address >> 20][address & 0xFFFFF];
}
void read(uint32_t address,uint32_t length, uint8_t *data){
for(unsigned i = 0;i < length;i++){
data[i] = (*this)[address + i];
}
}
void write(uint32_t address,uint32_t length, uint8_t *data){
for(unsigned i = 0;i < length;i++){
(*this)[address + i] = data[i];
}
}
virtual Size size() const { return (1<<31); };
void getBlock(uint32_t address, uint8_t *data)
{
uint32_t block_number = address & 0xffffff00; // To zero out block offset
uint32_t bytes_num = 256;
this->read(block_number, bytes_num, data);
}
void getWord(uint32_t address, uint32_t * data)
{
data[0] = 0;
uint8_t first = *get(address + 0);
uint8_t second = *get(address + 1);
uint8_t third = *get(address + 2);
uint8_t fourth = *get(address + 3);
// uint8_t hi = (uint8_t) *get(address + 0);
// std::cout << "RAM: READING ADDRESS " << address + 0 << " DATA: " << hi << "\n";
// hi = (uint8_t) *get(address + 1);
// std::cout << "RAM: READING ADDRESS " << address + 1 << " DATA: " << hi << "\n";
// hi = (uint8_t) *get(address + 2);
// std::cout << "RAM: READING ADDRESS " << address + 2 << " DATA: " << hi << "\n";
// hi = (uint8_t) *get(address + 3);
// std::cout << "RAM: READING ADDRESS " << address + 3 << " DATA: " << hi << "\n";
data[0] = (data[0] << 0) | fourth;
data[0] = (data[0] << 8) | third;
data[0] = (data[0] << 8) | second;
data[0] = (data[0] << 8) | first;
}
void writeWord(uint32_t address, uint32_t * data)
{
uint32_t data_to_write = *data;
uint32_t byte_mask = 0xFF;
for (int i = 0; i < 4; i++)
{
// std::cout << "RAM: DATA TO WRITE " << data_to_write << "\n";
// std::cout << "RAM: DATA TO MASK " << byte_mask << "\n";
// std::cout << "RAM: WRITING ADDRESS " << address + i << " DATA: " << (data_to_write & byte_mask) << "\n";
(*this)[address + i] = data_to_write & byte_mask;
data_to_write = data_to_write >> 8;
}
}
void writeHalf(uint32_t address, uint32_t * data)
{
uint32_t data_to_write = *data;
uint32_t byte_mask = 0xFF;
for (int i = 0; i < 2; i++)
{
// std::cout << "RAM: DATA TO WRITE " << data_to_write << "\n";
// std::cout << "RAM: DATA TO MASK " << byte_mask << "\n";
// std::cout << "RAM: WRITING ADDRESS " << address + i << " DATA: " << (data_to_write & byte_mask) << "\n";
(*this)[address + i] = data_to_write & byte_mask;
data_to_write = data_to_write >> 8;
}
}
void writeByte(uint32_t address, uint32_t * data)
{
uint32_t data_to_write = *data;
uint32_t byte_mask = 0xFF;
(*this)[address] = data_to_write & byte_mask;
data_to_write = data_to_write >> 8;
}
uint8_t& operator [](uint32_t address) {
return *get(address);
}
virtual void write(Addr addr, Word w)
{
uint32_t word = (uint32_t) w;
writeWord(addr, &word);
}
virtual Word read(Addr addr)
{
uint32_t w;
getWord(addr, &w);
return (Word) w;
}
virtual Byte *base()
{
return (Byte *) this->get(0);
}
// MEMORY UTILS
uint32_t hti_old(char c) {
if (c >= 'A' && c <= 'F')
return c - 'A' + 10;
if (c >= 'a' && c <= 'f')
return c - 'a' + 10;
return c - '0';
}
uint32_t hToI_old(char *c, uint32_t size) {
uint32_t value = 0;
for (uint32_t i = 0; i < size; i++) {
value += hti_old(c[i]) << ((size - i - 1) * 4);
}
return value;
}
void loadHexImpl(std::string path) {
this->clear();
FILE *fp = fopen(&path[0], "r");
if(fp == 0){
std::cout << path << " not found" << std::endl;
}
//Preload 0x0 <-> 0x80000000 jumps
((uint32_t*)this->get(0))[0] = 0xf1401073;
((uint32_t*)this->get(0))[1] = 0xf1401073;
// ((uint32_t*)this->get(0))[1] = 0xf1401073;
((uint32_t*)this->get(0))[2] = 0x30101073;
((uint32_t*)this->get(0))[3] = 0x800000b7;
((uint32_t*)this->get(0))[4] = 0x000080e7;
((uint32_t*)this->get(0x80000000))[0] = 0x00000097;
((uint32_t*)this->get(0xb0000000))[0] = 0x01C02023;
// F00FFF10
((uint32_t*)this->get(0xf00fff10))[0] = 0x12345678;
fseek(fp, 0, SEEK_END);
uint32_t size = ftell(fp);
fseek(fp, 0, SEEK_SET);
char* content = new char[size];
int x = fread(content, 1, size, fp);
if (!x) { std::cout << "COULD NOT READ FILE\n"; exit(1);}
int offset = 0;
char* line = content;
// std::cout << "WHTA\n";
while (1) {
if (line[0] == ':') {
uint32_t byteCount = hToI_old(line + 1, 2);
uint32_t nextAddr = hToI_old(line + 3, 4) + offset;
uint32_t key = hToI_old(line + 7, 2);
switch (key) {
case 0:
for (uint32_t i = 0; i < byteCount; i++) {
unsigned add = nextAddr + i;
*(this->get(add)) = hToI_old(line + 9 + i * 2, 2);
// std::cout << "Address: " << std::hex <<(add) << "\tValue: " << std::hex << hToI_old(line + 9 + i * 2, 2) << std::endl;
}
break;
case 2:
// cout << offset << endl;
offset = hToI_old(line + 9, 4) << 4;
break;
case 4:
// cout << offset << endl;
offset = hToI_old(line + 9, 4) << 16;
break;
default:
// cout << "??? " << key << endl;
break;
}
}
while (*line != '\n' && size != 0) {
line++;
size--;
}
if (size <= 1)
break;
line++;
size--;
}
if (content) delete[] content;
}
};
};
#endif

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@@ -16,38 +16,38 @@
#include "enc.h"
#include "asm-tokens.h"
// namespace Harp {
// class Decoder;
// class Encoder;
namespace Harp {
class Decoder;
class Encoder;
// class Ref {
// public:
// std::string name;
// Ref(const std::string &n, bool r, Size ib = 0):
// name(n), bound(false), relative(r), ibase(ib) { }
// virtual ~Ref() { }
// virtual void bind(Addr addr, Addr base = 0) = 0;
// virtual Addr getAddr() const = 0;
class Ref {
public:
std::string name;
Ref(const std::string &n, bool r, Size ib = 0):
name(n), bound(false), relative(r), ibase(ib) { }
virtual ~Ref() { }
virtual void bind(Addr addr, Addr base = 0) = 0;
virtual Addr getAddr() const = 0;
// bool bound, relative;
// Size ibase;
// };
bool bound, relative;
Size ibase;
};
// /* Used in not-yet-encoded code objects, plain old data. */
// class SimpleRef : public Ref {
// public:
// SimpleRef(const std::string &name, Addr &addr, bool rel = false) :
// Ref(name, rel), addr(addr) { }
// virtual void bind(Addr addr, Addr base = 0) {
// std::cout << "Attempted to bind a SimpleRef.\n";
// exit(1);
// }
// virtual Addr getAddr() const { return this->addr; }
// Byte *getAddrPtr() { return (Byte*)&addr; }
/* Used in not-yet-encoded code objects, plain old data. */
class SimpleRef : public Ref {
public:
SimpleRef(const std::string &name, Addr &addr, bool rel = false) :
Ref(name, rel), addr(addr) { }
virtual void bind(Addr addr, Addr base = 0) {
std::cout << "Attempted to bind a SimpleRef.\n";
exit(1);
}
virtual Addr getAddr() const { return this->addr; }
Byte *getAddrPtr() { return (Byte*)&addr; }
// private:
// Addr &addr;
// };
private:
Addr &addr;
};
// /* Used in already-encoded code objects. */
// class OffsetRef : public Ref {
@@ -205,6 +205,6 @@
// private:
// const ArchDef &arch;
// };
// };
};
#endif