- using SV_DPI defines to disable DPI in synthesis-based simulations

- fixed Intel ASE run script: run_ase.sh

hw/rtl/VX_config.vh

@@ -191,6 +191,10 @@
 `define STALL_TIMEOUT (100000 * (1 ** (`L2_ENABLED + `L3_ENABLED)))
 `endif
 
+`ifndef SV_DPI
+`define DPI_DISABLE
+`endif
+
 `ifndef FPU_FPNEW
 `ifndef FPU_DSP
 `ifndef FPU_DPI

hw/rtl/VX_platform.vh

@@ -14,7 +14,7 @@
 `ifndef VX_PLATFORM_VH
 `define VX_PLATFORM_VH
 
-`ifndef SYNTHESIS
+`ifdef SV_DPI
 `include "util_dpi.vh"
 `endif
 

hw/rtl/core/VX_dispatch.sv

@@ -12,6 +12,7 @@
 // limitations under the License.
 
 `include "VX_define.vh"
+`include "VX_trace.vh"
 
 module VX_dispatch import VX_gpu_pkg::*; #(
     parameter CORE_ID = 0

hw/rtl/core/VX_schedule.sv

@@ -308,13 +308,20 @@ module VX_schedule import VX_gpu_pkg::*; #(
     localparam GNW_WIDTH = `LOG2UP(`NUM_CLUSTERS * `NUM_CORES * `NUM_WARPS);
     reg [`UUID_WIDTH-1:0] instr_uuid;
     wire [GNW_WIDTH-1:0] g_wid = (GNW_WIDTH'(CORE_ID) << `NW_BITS) + GNW_WIDTH'(schedule_wid);
+`ifdef SV_DPI
     always @(posedge clk) begin
         if (reset) begin
             instr_uuid <= `UUID_WIDTH'(dpi_uuid_gen(1, 0, 0));
         end else if (schedule_fire) begin
             instr_uuid <= `UUID_WIDTH'(dpi_uuid_gen(0, 32'(g_wid), 64'(schedule_pc)));
-        end
+        end        
     end
+`else
+    wire [GNW_WIDTH+16-1:0] w_uuid = {g_wid, 16'(schedule_pc)};
+    always @(*) begin
+        instr_uuid = `UUID_WIDTH'(w_uuid);
+    end
+`endif
 `else
     wire [`UUID_WIDTH-1:0] instr_uuid = '0;
 `endif

hw/rtl/core/VX_trace.vh

@@ -14,9 +14,7 @@
 `ifndef VX_TRACE_VH
 `define VX_TRACE_VH
 
-`ifndef SYNTHESIS
+`ifdef SIMULATION
-
-`include "VX_define.vh"
 
 task trace_ex_type(input int level, input [`EX_BITS-1:0] ex_type);
     case (ex_type)

hw/rtl/fpu/VX_fpu_define.vh

@@ -16,7 +16,7 @@
 
 `include "VX_define.vh"
 
-`ifndef SYNTHESIS
+`ifdef SV_DPI
 `include "float_dpi.vh"
 `endif
 

hw/syn/altera/NOTEBOOK

@@ -56,17 +56,17 @@ TARGET=asesim make -C runtime/opae
 PREFIX=build_base CONFIGS="-DEXT_F_DISABLE -DL1_DISABLE -DSM_DISABLE -DNUM_WARPS=2 -DNUM_THREADS=2" TARGET=asesim make
 
 # ASE test runs
-./run_ase.sh build_base_arria10_asesim_1c/synth ../../../../tests/regression/basic/basic -n1 -t0
+./run_ase.sh build_base_arria10_asesim_1c ../../../../tests/regression/basic/basic -n1 -t0
-./run_ase.sh build_base_arria10_asesim_1c/synth ../../../../tests/regression/basic/basic -n1 -t1
+./run_ase.sh build_base_arria10_asesim_1c ../../../../tests/regression/basic/basic -n1 -t1
-./run_ase.sh build_base_arria10_asesim_1c/synth ../../../../tests/regression/basic/basic -n16
+./run_ase.sh build_base_arria10_asesim_1c ../../../../tests/regression/basic/basic -n16
-./run_ase.sh build_base_arria10_asesim_1c/synth ../../../../tests/regression/demo/demo -n16
+./run_ase.sh build_base_arria10_asesim_1c ../../../../tests/regression/demo/demo -n16
-./run_ase.sh build_base_arria10_asesim_1c/synth ../../../../tests/regression/dogfood/dogfood -n16
+./run_ase.sh build_base_arria10_asesim_1c ../../../../tests/regression/dogfood/dogfood -n16
-./run_ase.sh build_base_arria10_asesim_1c/synth ../../../../tests/opencl/vecadd/vecadd
+./run_ase.sh build_base_arria10_asesim_1c ../../../../tests/opencl/vecadd/vecadd
-./run_ase.sh build_base_arria10_asesim_1c/synth ../../../../tests/opencl/sgemm/sgemm -n4
+./run_ase.sh build_base_arria10_asesim_1c ../../../../tests/opencl/sgemm/sgemm -n4
 
 # modify "vsim_run.tcl" to dump VCD trace
 vcd file trace.vcd
-vcd add -r /*/Vortex/hw/rtl/* 
+vcd add -r /*/afu/*
 run -all
 
 # compress FPGA output files

hw/syn/altera/opae/run_ase.sh

@@ -15,27 +15,27 @@
 
 SCRIPT_DIR="$( cd "$( dirname "${BASH_SOURCE[0]}" )" >/dev/null 2>&1 && pwd )"
 
-BUILD_DIR=$1
+BUILD_DIR=$(realpath $1)
 
 PROGRAM=$(basename "$2")
 PROGRAM_DIR=`dirname $2`
 
+POCL_RT_PATH=$TOOLDIR/pocl/runtime
 VORTEX_RT_PATH=$SCRIPT_DIR/../../../../runtime
 
 # Export ASE_WORKDIR variable
-export ASE_WORKDIR=$SCRIPT_DIR/$BUILD_DIR/work
+export ASE_WORKDIR=$BUILD_DIR/synth/work
-
-shift 2
 
 # cleanup incomplete runs
 rm -f $ASE_WORKDIR/.app_lock.pid 
 rm -f $ASE_WORKDIR/.ase_ready.pid
-rm -f $SCRIPT_DIR/$BUILD_DIR/nohup.out
+rm -f $BUILD_DIR/synth/nohup.out
 
-# Start Simulator in background
+# Start Simulator in background (capture processs group pid)
-pushd $SCRIPT_DIR/$BUILD_DIR 
+pushd $BUILD_DIR/synth 
-echo "  [DBG]  starting ASE simnulator (stdout saved to '$SCRIPT_DIR/$BUILD_DIR/nohup.out')"
+echo "  [DBG]  starting ASE simnulator (stdout saved to '$BUILD_DIR/synth/nohup.out')"
-nohup make sim & 
+setsid make sim &> /dev/null &
+SIM_PID=$!
 popd
 
 # Wait for simulator readiness
@@ -47,6 +47,11 @@ done
 
 # run application
 pushd $PROGRAM_DIR
+shift 2
 echo "  [DBG]  running ./$PROGRAM $*"
 ASE_LOG=0 LD_LIBRARY_PATH=$POCL_RT_PATH/lib:$VORTEX_RT_PATH/opae:$LD_LIBRARY_PATH ./$PROGRAM $*
 popd
+
+# stop the simulator (kill process group)
+kill -- -$(ps -o pgid= $SIM_PID | grep -o '[0-9]*')
+wait $SIM_PID 2> /dev/null

sim/opaesim/Makefile

@@ -75,7 +75,7 @@ TOP = vortex_afu_shim
 VL_FLAGS += --language 1800-2009 --assert -Wall -Wpedantic
 VL_FLAGS += -Wno-DECLFILENAME -Wno-REDEFMACRO
 VL_FLAGS += --x-initial unique --x-assign unique
-VL_FLAGS += -DSIMULATION
+VL_FLAGS += -DSIMULATION -DSV_DPI
 VL_FLAGS += -DXLEN_$(XLEN)
 VL_FLAGS += $(CONFIGS)
 VL_FLAGS += verilator.vlt

sim/rtlsim/Makefile

@@ -56,7 +56,7 @@ VL_FLAGS += --language 1800-2009 --assert -Wall -Wpedantic
 VL_FLAGS += -Wno-DECLFILENAME -Wno-REDEFMACRO
 VL_FLAGS += --x-initial unique --x-assign unique
 VL_FLAGS += verilator.vlt
-VL_FLAGS += -DSIMULATION
+VL_FLAGS += -DSIMULATION -DSV_DPI
 VL_FLAGS += -DXLEN_$(XLEN)
 VL_FLAGS += $(CONFIGS)
 VL_FLAGS += $(RTL_INCLUDE)