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reset network optimization

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This commit is contained in:
Blaise Tine
2021-07-01 18:05:59 -07:00
parent 65c1078158
commit 360f8e4e37
6 changed files with 74 additions and 71 deletions
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32
hw/rtl/VX_execute.v
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@@ -42,23 +42,32 @@ module VX_execute #(
VX_fpu_to_csr_if fpu_to_csr_if();
wire[`NUM_WARPS-1:0] csr_pending;
wire[`NUM_WARPS-1:0] fpu_pending;
wire alu_reset, lsu_reset, csr_reset, fpu_reset, gpu_reset;
VX_reset_relay #(
.NUM_NODES (5)
) reset_relay (
.clk (clk),
.reset (reset),
.reset_o ({alu_reset, lsu_reset, csr_reset, fpu_reset, gpu_reset})
);
VX_alu_unit #(
.CORE_ID(CORE_ID)
.CORE_ID (CORE_ID)
) alu_unit (
.clk (clk),
.reset (reset),
.reset (alu_reset),
.alu_req_if (alu_req_if),
.branch_ctl_if (branch_ctl_if),
.alu_commit_if (alu_commit_if)
);
VX_lsu_unit #(
.CORE_ID(CORE_ID)
.CORE_ID (CORE_ID)
) lsu_unit (
`SCOPE_BIND_VX_execute_lsu_unit
.clk (clk),
.reset (reset),
.reset (lsu_reset),
.dcache_req_if (dcache_req_if),
.dcache_rsp_if (dcache_rsp_if),
.lsu_req_if (lsu_req_if),
@@ -67,12 +76,12 @@ module VX_execute #(
);
VX_csr_unit #(
.CORE_ID(CORE_ID)
.CORE_ID (CORE_ID)
) csr_unit (
.clk (clk),
.reset (reset),
.reset (csr_reset),
`ifdef PERF_ENABLE
.perf_memsys_if (perf_memsys_if),
.perf_memsys_if (perf_memsys_if),
.perf_pipeline_if (perf_pipeline_if),
`endif
.cmt_to_csr_if (cmt_to_csr_if),
@@ -86,10 +95,10 @@ module VX_execute #(
`ifdef EXT_F_ENABLE
VX_fpu_unit #(
.CORE_ID(CORE_ID)
.CORE_ID (CORE_ID)
) fpu_unit (
.clk (clk),
.reset (reset),
.reset (fpu_reset),
.fpu_req_if (fpu_req_if),
.fpu_to_csr_if (fpu_to_csr_if),
.fpu_commit_if (fpu_commit_if),
@@ -97,6 +106,7 @@ module VX_execute #(
.pending (fpu_pending)
);
`else
`UNUSED_VAR (fpu_reset)
`UNUSED_VAR (csr_pending)
`UNUSED_VAR (fpu_to_csr_if.read_frm)
assign fpu_req_if.ready = 0;
@@ -115,11 +125,11 @@ module VX_execute #(
`endif
VX_gpu_unit #(
.CORE_ID(CORE_ID)
.CORE_ID (CORE_ID)
) gpu_unit (
`SCOPE_BIND_VX_execute_gpu_unit
.clk (clk),
.reset (reset),
.reset (gpu_reset),
.gpu_req_if (gpu_req_if),
.warp_ctl_if (warp_ctl_if),
.gpu_commit_if (gpu_commit_if)