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Update Vortex core for Blackwell tensor instructions

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- Add Blackwell tensor core support in VX_tensor_blackwell_core.sv
- Update decode, execute, and dispatch logic for new instructions
- Extend VX_define.vh and VX_types.vh with Blackwell ISA definitions
This commit is contained in:
abnerhexu
2026-05-06 14:50:54 +08:00
parent cb912d3b8b
commit 323ed7d7e9
17 changed files with 492 additions and 114 deletions
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30
hw/rtl/core/VX_issue.sv
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@@ -121,6 +121,36 @@ module VX_issue import VX_gpu_pkg::*; #(
.sfu_dispatch_if(sfu_dispatch_if)
);
`ifdef SIMULATION
`ifdef DBG_TRACE_CORE_PIPELINE_VCS
for (genvar i = 0; i < `ISSUE_WIDTH; ++i) begin
wire ibuf_probe_pc = ibuffer_if[i].valid
&& (ibuffer_if[i].data.PC >= 32'h80000240)
&& (ibuffer_if[i].data.PC <= 32'h80000260);
wire scb_probe_pc = scoreboard_if[i].valid
&& (scoreboard_if[i].data.PC >= 32'h80000240)
&& (scoreboard_if[i].data.PC <= 32'h80000260);
wire ops_probe_pc = operands_if[i].valid
&& (operands_if[i].data.PC >= 32'h80000240)
&& (operands_if[i].data.PC <= 32'h80000260);
always @(posedge clk) begin
if (!reset && (CORE_ID == 0) && ($time > `TRACE_STARTTIME) && (ibuf_probe_pc || scb_probe_pc || ops_probe_pc)) begin
`TRACE(2, ("%d: core%0d-issue-probe: isw=%0d, ibuf=%b/%b PC=0x%0h ex=0x%0h op=0x%0h, scb=%b/%b PC=0x%0h ex=0x%0h op=0x%0h, ops=%b/%b PC=0x%0h ex=0x%0h op=0x%0h, alu=%b/%b lsu=%b/%b sfu=%b/%b (#ibuf=%0d #scb=%0d #ops=%0d)\n",
$time, CORE_ID, i,
ibuffer_if[i].valid, ibuffer_if[i].ready, ibuffer_if[i].data.PC, ibuffer_if[i].data.ex_type, ibuffer_if[i].data.op_type,
scoreboard_if[i].valid, scoreboard_if[i].ready, scoreboard_if[i].data.PC, scoreboard_if[i].data.ex_type, scoreboard_if[i].data.op_type,
operands_if[i].valid, operands_if[i].ready, operands_if[i].data.PC, operands_if[i].data.ex_type, operands_if[i].data.op_type,
alu_dispatch_if[i].valid, alu_dispatch_if[i].ready,
lsu_dispatch_if[i].valid, lsu_dispatch_if[i].ready,
sfu_dispatch_if[i].valid, sfu_dispatch_if[i].ready,
ibuffer_if[i].data.uuid, scoreboard_if[i].data.uuid, operands_if[i].data.uuid));
end
end
end
`endif
`endif
`ifdef DBG_SCOPE_ISSUE
if (CORE_ID == 0) begin
`ifdef SCOPE