rtl refactoring
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@@ -15,7 +15,7 @@
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#include <vector>
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//#define ENABLE_DRAM_STALLS
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#define DRAM_LATENCY 200
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#define DRAM_LATENCY 100
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#define DRAM_RQ_SIZE 16
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#define DRAM_STALLS_MODULO 16
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#define PIPELINE_FLUSH_LATENCY 300
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