fixed register file initialization to zero synthesis inference

2020-12-10 00:27:56 -08:00
parent 3e9abb978b
commit 29cd2f5dff
10 changed files with 171 additions and 130 deletions
--- a/driver/opae/vx_scope.h
+++ b/driver/opae/vx_scope.h
@@ -1,6 +1,10 @@
 #pragma once

+#if defined(USE_FPGA)
 #define HANG_TIMEOUT 60
+#else
+#define HANG_TIMEOUT (30*60)
+#endif

 int vx_scope_start(fpga_handle hfpga, uint64_t delay = -1);