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pipeline optimization

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This commit is contained in:
Blaise Tine
2020-07-30 03:06:01 -07:00
parent 60e05ae19a
commit 27e95530ef
20 changed files with 184 additions and 340 deletions
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12
hw/rtl/VX_warp_sched.v
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@@ -205,24 +205,26 @@ module VX_warp_sched #(
assign {join_fall, join_pc, join_tm} = ipdom[join_if.warp_num];
genvar i;
for (i = 0; i < `NUM_WARPS; i++) begin : stacks
for (i = 0; i < `NUM_WARPS; i++) begin
wire correct_warp_s = (i == warp_ctl_if.warp_num);
wire correct_warp_j = (i == join_if.warp_num);
wire push = (warp_ctl_if.is_split && warp_ctl_if.do_split) && correct_warp_s;
wire pop = join_if.is_join && correct_warp_j;
VX_generic_stack #(
VX_ipdom_stack #(
.WIDTH(1+32+`NUM_THREADS),
.DEPTH($clog2(`NUM_THREADS)+1)
) ipdom_stack(
.DEPTH(`NT_BITS+1)
) ipdom_stack (
.clk (clk),
.reset(reset),
.push (push),
.pop (pop),
.d (ipdom[i]),
.q1 (q1),
.q2 (q2)
.q2 (q2),
`UNUSED_PIN (empty),
`UNUSED_PIN (full)
);
end