cache area optimization by disabling BRAM read-during-write bypassing for tag/data stores

This commit is contained in:
Blaise Tine
2021-08-26 12:27:38 -07:00
parent 74a45e2772
commit 26e94dde44
5 changed files with 23 additions and 10 deletions

7
hw/syn/opae/fpga_prog.sh Executable file
View File

@@ -0,0 +1,7 @@
#!/bin/bash
# FPGA programming
# first argument is the bitstream
echo "fpgaconf --bus 0xaf $1"
fpgaconf --bus 0xaf $1