pipeline refactoring

hw/rtl/interfaces/VX_ifetch_rsp_if.v

@@ -0,0 +1,16 @@
+`ifndef VX_IFETCH_RSP_IF
+`define VX_IFETCH_RSP_IF
+
+`include "VX_define.vh"
+
+interface VX_ifetch_rsp_if ();
+
+    wire [`NUM_THREADS-1:0]   valid;
+    wire [31:0]               curr_PC;
+    wire [`NW_BITS-1:0]       warp_num;
+    wire [31:0]               instr;
+    wire                      ready;
+
+endinterface
+
+`endif