From 25647b46df52f550745ec3859d98c986073ced5f Mon Sep 17 00:00:00 2001 From: felsabbagh3 Date: Wed, 13 Nov 2019 02:15:18 -0500 Subject: [PATCH] Fixed SM simple --- rtl/shared_memory/VX_shared_memory.v | 9 +++++---- rtl/shared_memory/VX_shared_memory_block.v | 12 ++++++------ 2 files changed, 11 insertions(+), 10 deletions(-) diff --git a/rtl/shared_memory/VX_shared_memory.v b/rtl/shared_memory/VX_shared_memory.v index 9b4d6010..3442af86 100644 --- a/rtl/shared_memory/VX_shared_memory.v +++ b/rtl/shared_memory/VX_shared_memory.v @@ -35,7 +35,6 @@ reg [NB:0][1:0] block_we; wire send_data; reg[NB:0][1:0] req_num; -reg shm_write; wire [`NT_M1:0] orig_in_valid; @@ -67,10 +66,14 @@ VX_priority_encoder_sm #(.NB(NB), .BITS_PER_BANK(BITS_PER_BANK)) vx_priority_enc .send_data(send_data) ); + genvar j; integer i; generate -for(j=0; j<= NB; j=j+1) begin +for(j=0; j<= NB; j=j+1) begin : sm_mem_block + + wire shm_write = (mem_write != `NO_MEM_WRITE) && temp_in_valid[j]; + VX_shared_memory_block vx_shared_memory_block( .clk (clk), .reset (reset), @@ -93,7 +96,6 @@ always @(*) begin if((temp_address[i][31:24]) == 8'hFF) begin // STORES if(mem_write != `NO_MEM_WRITE) begin - shm_write = 1'b1; if(mem_write == `SB_MEM_WRITE) begin //TODO end @@ -108,7 +110,6 @@ always @(*) begin end //LOADS else if(mem_read != `NO_MEM_READ) begin - shm_write = 1'b0; if(mem_read == `LB_MEM_READ) begin //TODO end diff --git a/rtl/shared_memory/VX_shared_memory_block.v b/rtl/shared_memory/VX_shared_memory_block.v index 66aa6172..ab52d539 100644 --- a/rtl/shared_memory/VX_shared_memory_block.v +++ b/rtl/shared_memory/VX_shared_memory_block.v @@ -36,15 +36,15 @@ module VX_shared_memory_block ( `else - wire cena = 1; - wire cenb = shm_write; + wire cena = 0; + wire cenb = !shm_write; wire[3:0][31:0] write_bit_mask; - assign write_bit_mask[0] = (we == 2'b00) ? 1 : {32{1'b0}}; - assign write_bit_mask[1] = (we == 2'b01) ? 1 : {32{1'b0}}; - assign write_bit_mask[2] = (we == 2'b10) ? 1 : {32{1'b0}}; - assign write_bit_mask[3] = (we == 2'b11) ? 1 : {32{1'b0}}; + assign write_bit_mask[0] = (we == 2'b00) ? {32{1'b1}} : {32{1'b0}}; + assign write_bit_mask[1] = (we == 2'b01) ? {32{1'b1}} : {32{1'b0}}; + assign write_bit_mask[2] = (we == 2'b10) ? {32{1'b1}} : {32{1'b0}}; + assign write_bit_mask[3] = (we == 2'b11) ? {32{1'b1}} : {32{1'b0}}; // Using ASIC MEM /* verilator lint_off PINCONNECTEMPTY */