minor update

ci/regression.sh

@@ -11,6 +11,9 @@ make -C tests/riscv/isa run
 make -C tests/opencl run
 make -C simX run-tests
 
+# basic pipeline stress
+./ci/travis_run.py ./ci/blackbox.sh --driver=rtlsim --cores=1 --app=sgemm --args="-n128"
+
 # warp/threads configurations
 ./ci/travis_run.py ./ci/blackbox.sh --driver=rtlsim --cores=1 --warps=2 --threads=2 --app=demo
 ./ci/travis_run.py ./ci/blackbox.sh --driver=rtlsim --cores=1 --warps=2 --threads=8 --app=demo
@@ -41,7 +44,10 @@ CONFIGS=-DEXT_F_DISABLE make -C hw/simulate
 # disable shared memory
 CONFIGS=-DSM_ENABLE=0 make -C hw/simulate
 
-# using FPNEW core
+# using Default FPU core
+FPU_CORE=FPU_DEFAULT ./ci/blackbox.sh --driver=rtlsim --cores=1 --app=dogfood
+
+# using FPNEW FPU core
 FPU_CORE=FPU_FPNEW ./ci/blackbox.sh --driver=rtlsim --cores=1 --app=dogfood
 
 # test 128-bit MEM block

driver/opae/vlsim/opae_sim.cpp

@@ -159,7 +159,7 @@ void opae_sim::reset() {
   vortex_afu_->vcp2af_sRxPort_c0_TxAlmFull = 0;
   vortex_afu_->vcp2af_sRxPort_c1_TxAlmFull = 0;
 
-  for (int b = 0; b < PLATFORM_PARAM_LOCAL_MEMORY_BANKS; ++b) {
+  for (int b = 0; b < MEMORY_BANKS; ++b) {
     mem_reads_[b].clear();
     vortex_afu_->avs_readdatavalid[b] = 0;  
     vortex_afu_->avs_waitrequest[b] = 0;
@@ -284,7 +284,7 @@ void opae_sim::sTxPort_bus() {
 }
   
 void opae_sim::avs_bus() {
-  for (int b = 0; b < PLATFORM_PARAM_LOCAL_MEMORY_BANKS; ++b) {
+  for (int b = 0; b < MEMORY_BANKS; ++b) {
     // update memory responses schedule
     for (auto& rsp : mem_reads_[b]) {
       if (rsp.cycles_left > 0)

driver/opae/vlsim/opae_sim.h

@@ -18,6 +18,14 @@
 #include <list>
 #include <unordered_map>
 
+#ifndef MEMORY_BANKS 
+  #ifdef PLATFORM_PARAM_LOCAL_MEMORY_BANKS
+    #define MEMORY_BANKS PLATFORM_PARAM_LOCAL_MEMORY_BANKS
+  #else
+    #define MEMORY_BANKS 2
+  #endif
+#endif
+
 #undef MEM_BLOCK_SIZE
 #define MEM_BLOCK_SIZE    (PLATFORM_PARAM_LOCAL_MEMORY_DATA_WIDTH / 8)
 
@@ -81,7 +89,7 @@ private:
   std::unordered_map<int64_t, host_buffer_t> host_buffers_;
   int64_t host_buffer_ids_;
 
-  std::list<mem_rd_req_t> mem_reads_ [PLATFORM_PARAM_LOCAL_MEMORY_BANKS];
+  std::list<mem_rd_req_t> mem_reads_ [MEMORY_BANKS];
 
   std::list<cci_rd_req_t> cci_reads_;
 

hw/rtl/VX_config.vh

@@ -117,7 +117,7 @@
 `endif
 
 `ifndef LATENCY_FCVT
-`define LATENCY_FCVT 4
+`define LATENCY_FCVT 5
 `endif
 
 // CSR Addresses //////////////////////////////////////////////////////////////
@@ -231,7 +231,7 @@
 
 // Size of LSU Request Queue
 `ifndef LSUQ_SIZE
-`define LSUQ_SIZE 8
+`define LSUQ_SIZE (`NUM_WARPS * 2)
 `endif
 
 // Size of FPU Request Queue
@@ -300,7 +300,7 @@
 
 // Memory Response Queue Size
 `ifndef DMRSQ_SIZE
-`define DMRSQ_SIZE `MAX(4, (`DNUM_BANKS * 2))
+`define DMRSQ_SIZE `MAX(4, `DNUM_BANKS)
 `endif
 
 // SM Configurable Knobs //////////////////////////////////////////////////////
@@ -329,7 +329,7 @@
 
 // Size of cache in bytes
 `ifndef L2CACHE_SIZE
-`define L2CACHE_SIZE 65536
+`define L2CACHE_SIZE 131072
 `endif
 
 // Number of banks
@@ -361,7 +361,7 @@
 
 // Size of cache in bytes
 `ifndef L3CACHE_SIZE
-`define L3CACHE_SIZE 131072
+`define L3CACHE_SIZE 1048576
 `endif
 
 // Number of banks

hw/simulate/simulator.cpp

@@ -69,12 +69,18 @@ Simulator::~Simulator() {
 
 void Simulator::attach_ram(RAM* ram) {
   ram_ = ram;
-  mem_rsp_vec_.clear();
+  for (int b = 0; b < MEMORY_BANKS; ++b) {
+    mem_rsp_vec_[b].clear();
+  }
+  last_mem_rsp_bank_ = 0;
 }
 
 void Simulator::reset() { 
   print_bufs_.clear();
-  mem_rsp_vec_.clear();
+  for (int b = 0; b < MEMORY_BANKS; ++b) {
+    mem_rsp_vec_[b].clear();
+  }
+  last_mem_rsp_bank_ = 0;
 
   mem_rsp_active_ = false;
 
@@ -128,42 +134,54 @@ void Simulator::eval_mem_bus() {
   }
 
   // update memory responses schedule
-  for (auto& rsp : mem_rsp_vec_) {
+  for (int b = 0; b < MEMORY_BANKS; ++b) {    
-    if (rsp.cycles_left > 0)
+    for (auto& rsp : mem_rsp_vec_[b]) {
-      rsp.cycles_left -= 1;
+      if (rsp.cycles_left > 0)
+        rsp.cycles_left -= 1;
+    }
   }
 
+  bool has_response = false;
+
   // schedule memory responses in FIFO order
-  std::list<mem_req_t>::iterator mem_rsp_it(mem_rsp_vec_.end());
+  for (int i = 0; i < MEMORY_BANKS; ++i) {
-  if (!mem_rsp_vec_.empty() 
+    uint32_t b = (i + last_mem_rsp_bank_ + 1) % MEMORY_BANKS;
-   && (0 == mem_rsp_vec_.begin()->cycles_left)) {
+    if (!mem_rsp_vec_[b].empty()
-      mem_rsp_it = mem_rsp_vec_.begin();
+    && (0 == mem_rsp_vec_[b].begin()->cycles_left)) {
+        has_response = true;
+        last_mem_rsp_bank_ = b;
+        break;
+    }
   }
 
   // send memory response  
   if (mem_rsp_active_
-   && vortex_->mem_rsp_valid && mem_rsp_ready_) {
+  && vortex_->mem_rsp_valid && mem_rsp_ready_) {
     mem_rsp_active_ = false;
   }
   if (!mem_rsp_active_) {
-    if (mem_rsp_it != mem_rsp_vec_.end()) {
+    if (has_response) {
-      vortex_->mem_rsp_valid = 1;
+      vortex_->mem_rsp_valid = 1;      
+      std::list<mem_req_t>::iterator mem_rsp_it = mem_rsp_vec_[last_mem_rsp_bank_].begin();
       memcpy((uint8_t*)vortex_->mem_rsp_data, mem_rsp_it->block.data(), MEM_BLOCK_SIZE);
       vortex_->mem_rsp_tag = mem_rsp_it->tag;   
-      mem_rsp_vec_.erase(mem_rsp_it);
+      mem_rsp_vec_[last_mem_rsp_bank_].erase(mem_rsp_it);
       mem_rsp_active_ = true;
     } else {
       vortex_->mem_rsp_valid = 0;
     }
   }
 
+  // select the memory bank
+  uint32_t req_bank = vortex_->mem_req_addr % MEMORY_BANKS;
+
   // handle memory stalls
   bool mem_stalled = false;
 #ifdef ENABLE_MEM_STALLS
   if (0 == ((timestamp/2) % MEM_STALLS_MODULO)) { 
     mem_stalled = true;
   } else
-  if (mem_rsp_vec_.size() >= MEM_RQ_SIZE) {
+  if (mem_rsp_vec_[req_bank].size() >= MEM_RQ_SIZE) {
     mem_stalled = true;
   }
 #endif
@@ -201,13 +219,13 @@ void Simulator::eval_mem_bus() {
         mem_req.addr = vortex_->mem_req_addr;
         ram_->read(vortex_->mem_req_addr * MEM_BLOCK_SIZE, MEM_BLOCK_SIZE, mem_req.block.data());
         mem_req.cycles_left = MEM_LATENCY;
-        for (auto& rsp : mem_rsp_vec_) {
+        for (auto& rsp : mem_rsp_vec_[req_bank]) {
           if (mem_req.addr == rsp.addr) {
             mem_req.cycles_left = rsp.cycles_left;
             break;
           }
         }     
-        mem_rsp_vec_.emplace_back(mem_req);
+        mem_rsp_vec_[req_bank].emplace_back(mem_req);
       } 
     }    
   }

hw/simulate/simulator.h

@@ -17,6 +17,14 @@
 #include <sstream> 
 #include <unordered_map>
 
+#ifndef MEMORY_BANKS
+  #ifdef PLATFORM_PARAM_LOCAL_MEMORY_BANKS
+    #define MEMORY_BANKS PLATFORM_PARAM_LOCAL_MEMORY_BANKS
+  #else
+    #define MEMORY_BANKS 2
+  #endif
+#endif
+
 class Simulator {
 public:
   
@@ -57,7 +65,9 @@ private:
 
   void eval_mem_bus();
 
-  std::list<mem_req_t> mem_rsp_vec_;
+  std::list<mem_req_t> mem_rsp_vec_ [MEMORY_BANKS];
+  uint32_t last_mem_rsp_bank_;
+
   bool mem_rsp_active_;
 
   bool mem_rsp_ready_;

tests/opencl/nearn/Makefile

@@ -4,8 +4,10 @@ SYSROOT ?= $(RISCV_TOOLCHAIN_PATH)/riscv32-unknown-elf
 POCL_CC_PATH ?= /opt/pocl/compiler
 POCL_RT_PATH ?= /opt/pocl/runtime
 
+OPTS ?= filelist.txt
+
 VORTEX_DRV_PATH ?= $(realpath ../../../driver)
-VORTEX_RT_PATH ?= $(realpath ../../../runtime)
+VORTEX_RT_PATH ?= $(realpath ../../../runtime) 
 
 K_LLCFLAGS += "-O3 -march=riscv32 -target-abi=ilp32f -mcpu=generic-rv32 -mattr=+m,+f -float-abi=hard -code-model=small"
 K_CFLAGS   += "-v -O3 --sysroot=$(SYSROOT) --gcc-toolchain=$(RISCV_TOOLCHAIN_PATH) -march=rv32imf -mabi=ilp32f -I$(VORTEX_RT_PATH)/include -fno-rtti -fno-exceptions -ffreestanding -nostartfiles -fdata-sections -ffunction-sections"
@@ -34,19 +36,19 @@ $(PROJECT): $(SRCS)
 	$(CXX) $(CXXFLAGS) $^ $(LDFLAGS) -o $@
 
 run-fpga: $(PROJECT) kernel.pocl   
-	LD_LIBRARY_PATH=$(POCL_RT_PATH)/lib:$(VORTEX_DRV_PATH)/opae:$(LD_LIBRARY_PATH) ./$(PROJECT)
+	LD_LIBRARY_PATH=$(POCL_RT_PATH)/lib:$(VORTEX_DRV_PATH)/opae:$(LD_LIBRARY_PATH) ./$(PROJECT) $(OPTS)
 
 run-asesim: $(PROJECT) kernel.pocl   
-	LD_LIBRARY_PATH=$(POCL_RT_PATH)/lib:$(VORTEX_DRV_PATH)/opae/ase:$(LD_LIBRARY_PATH) ./$(PROJECT)
+	LD_LIBRARY_PATH=$(POCL_RT_PATH)/lib:$(VORTEX_DRV_PATH)/opae/ase:$(LD_LIBRARY_PATH) ./$(PROJECT) $(OPTS)
 	
 run-vlsim: $(PROJECT) kernel.pocl   
-	LD_LIBRARY_PATH=$(POCL_RT_PATH)/lib:$(VORTEX_DRV_PATH)/opae/vlsim:$(LD_LIBRARY_PATH) ./$(PROJECT)
+	LD_LIBRARY_PATH=$(POCL_RT_PATH)/lib:$(VORTEX_DRV_PATH)/opae/vlsim:$(LD_LIBRARY_PATH) ./$(PROJECT) $(OPTS)
 
 run-simx: $(PROJECT) kernel.pocl   
-	LD_LIBRARY_PATH=$(POCL_RT_PATH)/lib:$(VORTEX_DRV_PATH)/simx:$(LD_LIBRARY_PATH) ./$(PROJECT)
+	LD_LIBRARY_PATH=$(POCL_RT_PATH)/lib:$(VORTEX_DRV_PATH)/simx:$(LD_LIBRARY_PATH) ./$(PROJECT) $(OPTS)
 
 run-rtlsim: $(PROJECT) kernel.pocl   
-	LD_LIBRARY_PATH=$(POCL_RT_PATH)/lib:$(VORTEX_DRV_PATH)/rtlsim:$(LD_LIBRARY_PATH) ./$(PROJECT)
+	LD_LIBRARY_PATH=$(POCL_RT_PATH)/lib:$(VORTEX_DRV_PATH)/rtlsim:$(LD_LIBRARY_PATH) ./$(PROJECT) $(OPTS)
 
 .depend: $(SRCS)
 	$(CXX) $(CXXFLAGS) -MM $^ > .depend;

tests/opencl/nearn/inputgen/Makefile

@@ -0,0 +1,5 @@
+hurricanegen: hurricanegen.c
+	gcc -std=c99 -o $@ $<
+
+clean:
+	rm hurricanegen

tests/opencl/nearn/inputgen/gen_dataset.sh

@@ -0,0 +1,12 @@
+#!/bin/bash
+
+./hurricanegen 65536 1
+./hurricanegen 131072 1
+./hurricanegen 262144 1
+./hurricanegen 524288 1
+./hurricanegen 1048576 1
+./hurricanegen 2097152 1
+./hurricanegen 4194304 1
+./hurricanegen 8388608 1
+./hurricanegen 16777216 1
+./hurricanegen 33554432 1

tests/opencl/nearn/inputgen/gen_dataset_multifile.sh

@@ -0,0 +1,13 @@
+#!/bin/bash
+
+./hurricanegen 10240 1
+./hurricanegen 20480 2
+./hurricanegen 40960 4
+./hurricanegen 81920 8
+./hurricanegen 163840 16
+./hurricanegen 327680 32
+./hurricanegen 655360 64
+./hurricanegen 1310720 128
+./hurricanegen 2621440 256
+./hurricanegen 5242880 512
+

tests/opencl/nearn/inputgen/hurricanegen.c

@@ -0,0 +1,105 @@
+/*
+ * hurricanegen.c
+ * Original author unknown
+ * Modified by Sam Kauffman - University of Virginia
+ *
+ * Generates datasets of "hurricanes" to be used by Rodinia's Nearest Neighbor (nn)
+ * Also generates lists of the files in the dataset. These lists are passed to nn.
+ *
+ * Usage: hurricanegen <num_hurricanes> <num_files>
+ * The number of hurricanes should be a multiple of both 1024 and the number of files.
+ *
+ */
+
+#include <stdio.h>
+#include <stdlib.h>
+#include <time.h>
+
+// 641986 gets you ~30 MB of data
+int main(int argc, char **argv)
+{
+	FILE *fp;
+	int i = 0, total_canes = 0, canes = 0, num_files = 0, j = 0;
+	int year, month, date, hour, num, speed, press;
+	float lat, lon;
+	int hours[4] =
+	{ 0, 6, 12, 18 };
+	char *name, fname[30];
+	char names[21][10] =
+	{ "ALBERTO", "BERYL", "CHRIS", "DEBBY", "ERNESTO", "FLORENCE", "GORDON",
+			"HELENE", "ISAAC", "JOYCE", "KIRK", "LESLIE", "MICHAEL", "NADINE",
+			"OSCAR", "PATTY", "RAFAEL", "SANDY", "TONY", "VALERIE", "WILLIAM" };
+
+	if (argc < 3)
+	{
+		fprintf(stderr, "Error: Enter a number of hurricanes and a number of files.\n");
+		fprintf(stderr, "The number of hurricanes should be a multiple of both 1024\nand the number of files.\n");
+		exit(0);
+	}
+
+	total_canes = atoi(argv[1]);
+	num_files = atoi(argv[2]);
+
+	total_canes = ((total_canes+1023)/1024) * 1024; // round up to multiple of 1024
+	canes = (total_canes + num_files - 1) / num_files; // round up (ceiling division)
+	total_canes = canes * num_files;
+
+	srand(time(NULL));
+
+	for (j = 0; j < num_files; j++)
+	{
+		if (num_files == 1)
+			sprintf(fname, "cane%dk.db", total_canes / 1024);
+		else
+			sprintf(fname, "cane%dk_%d_%d.db", total_canes / 1024, num_files, j);
+
+		if ((fp = fopen(fname, "w")) == NULL)
+		{
+			fprintf(stderr, "Failed to open output file '%s'!\n", fname);
+			return -1;
+		}
+
+		for (i = 0; i < canes; i++)
+		{
+			year = 1950 + rand() % 55;
+			month = 1 + rand() % 12;
+			date = 1 + rand() % 28;
+			hour = hours[rand() % 4];
+			num = 1 + rand() % 28;
+			name = names[rand() % 21];
+			lat = ((float) (7 + rand() % 63))
+					+ ((float) rand() / (float) 0x7fffffff);
+			lon = ((float) (rand() % 358))
+					+ ((float) rand() / (float) 0x7fffffff);
+			speed = 10 + rand() % 155;
+			press = rand() % 900;
+
+			fprintf(fp, "%4d %2d %2d %2d %2d %-9s %5.1f %5.1f %4d %4d\n",
+					year, month, date, hour, num, name, lat, lon, speed, press);
+
+		}
+
+		fclose(fp);
+	}
+	printf("Generated %d hurricanes in %d file(s).\n", total_canes, num_files);
+
+	if (num_files == 1)
+	{
+		sprintf(fname, "list%dk.txt", total_canes / 1024);
+		fp = fopen(fname, "w");
+
+		fprintf(fp, "../../data/nn/cane%dk.db\n", total_canes / 1024);
+	}
+	else
+	{
+		sprintf(fname, "list%dk_%d.txt", total_canes / 1024, num_files);
+		fp = fopen(fname, "w");
+
+		for (int i = 0; i < num_files; i++)
+			fprintf(fp, "../../data/nn/cane%dk_%d_%d.db\n", total_canes / 1024, num_files, i);
+	}
+
+	fclose(fp);
+	printf( "File list written to %s.\n", fname );
+	return 0;
+}

tests/opencl/nearn/main.cc

@@ -237,12 +237,12 @@ int loadData(char *filename, std::vector<Record> &records,
       locations.push_back(latLong);
       records.push_back(record);
       recNum++;
-      if (0 == (recNum % 500))
+      /*if (0 == (recNum % 500))
-        break;
+        break;*/
     }
     
-    if (++q == 3)
+    /*if (++q == 3)
-        break;
+        break;*/
     fclose(fp);
   }
   fclose(flist);
@@ -281,8 +281,8 @@ void findLowest(std::vector<Record> &records, float *distances, int numRecords,
 int parseCommandline(int argc, char *argv[], char *filename, int *r, float *lat,
                      float *lng, int *q, int *t, int *p, int *d) {
   int i;
-  // if (argc < 2) return 1; // error
+  if (argc < 2) return 1; // error
-  strncpy(filename, "filelist.txt", 100);
+  strncpy(filename,argv[1],100);
   char flag;
 
   for (i = 1; i < argc; i++) {