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texunit partial update

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This commit is contained in:
Blaise Tine
2021-03-20 10:50:54 -04:00
parent 859877a00d
commit 20ae993e51
17 changed files with 194 additions and 223 deletions
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22
hw/rtl/tex_unit/VX_tex_memory.v
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@@ -1,8 +1,8 @@
`include "VX_define.vh"
module VX_tex_memory #(
parameter CORE_ID = 0,
parameter TAG_IN_WIDTH = 1
parameter CORE_ID = 0,
parameter REQ_TAG_WIDTH = 1
) (
`SCOPE_IO_VX_lsu_unit
@@ -14,21 +14,25 @@ module VX_tex_memory #(
VX_dcache_core_rsp_if dcache_rsp_if,
// inputs
input wire [3:0] req_valid,
input wire [3:0][31:0] req_addr,
input wire [TAG_IN_WIDTH-1:0] req_tag,
input wire req_valid,
input wire [`NUM_THREADS-1:0] req_tmask,
input wire [`TEX_FILTER_BITS-1:0] req_filter,
input wire [`NUM_THREADS-1:0][3:0][31:0] req_addr,
input wire [REQ_TAG_WIDTH-1:0] req_tag,
output wire req_ready,
// outputs
output wire rsp_valid,
output wire [3:0][31:0] rsp_data,
output wire [TAG_IN_WIDTH-1:0] rsp_tag,
output wire [`NUM_THREADS-1:0] rsp_tmask,
output wire [`TEX_FILTER_BITS-1:0] rsp_filter,
output wire [`NUM_THREADS-1:0][3:0][31:0] rsp_data,
output wire [REQ_TAG_WIDTH-1:0] rsp_tag,
input wire rsp_ready
);
`UNUSED_PARAM (CORE_ID)
wire req_valid;
/*wire req_valid;
wire [`NUM_THREADS-1:0] req_tmask;
wire [`NUM_THREADS-1:0][31:0] req_addr;
wire [`LSU_BITS-1:0] req_type;
@@ -296,6 +300,6 @@ module VX_tex_memory #(
$write("\n");
end
end
`endif
`endif*/
endmodule