RTL code refactoring

2020-04-20 13:52:24 -04:00
parent 94e4f056db
commit 1a2823da0d
31 changed files with 253 additions and 260 deletions
--- a/hw/unit_tests/generic_queue/testbench.v
+++ b/hw/unit_tests/generic_queue/testbench.v
@@ -17,10 +17,10 @@ module testbench();
  VX_generic_queue #(.DATAW(4), .SIZE(4)) dut (
                                .clk(clk), 
                                .reset(reset), 
-                                .in_data(in_data), 
+                                .data_i(in_data), 
                                .push(push), 
                                .pop(pop), 
-                                .out_data(out_data), 
+                                .data_o(out_data), 
                                .empty(empty), 
                                .full(full));