diff --git a/doc/Flubber_FPGA_Startup_Guide.md b/doc/Flubber_FPGA_Startup_Guide.md index b2fdc5db..3a2748e0 100644 --- a/doc/Flubber_FPGA_Startup_Guide.md +++ b/doc/Flubber_FPGA_Startup_Guide.md @@ -16,7 +16,7 @@ OPAE Environment Setup OPAE Build Configuration ------------------------ -Within the /hw/syn/opae directory, there are source text files for each core-option for the fpga build (the 32 and 64 core options are not currently implemented) which have the following parameters that can be configured: +Within the `/hw/syn/opae` directory, there are source text files for each core-option for the fpga build (the 32 and 64 core options are not currently implemented) which have the following parameters that can be configured: - NUM_CORES: the number of cores per cluster - NUM_CLUSTERS: the number of clusters alotted to the processor - L3_ENABLE: enable the use of the L3 cache @@ -35,35 +35,33 @@ The Flubber FPGA has to following configuration options: - 16 cores fpga (fpga-16c) $ cd hw/syn/opae - $ make fpga-*# of cores*c + $ make fpga- *# of cores* c Example: `make fpga-4c` -A new folder `build_fpga_*# of cores*c` will be created and the build will start and take ~30-45 min to complete. +A new folder (ex: `build_fpga_4c`) will be created and the build will start and take ~30-45 min to complete. OPAE Build Progress ------------------- You could check the last 10 lines in the build log for possible errors until build completion. - $ tail -n 10 ./build_fpga_*# of cores*c/build.log - -Example: `tail -n 10 ./build_fpga_4c/build.log` + $ tail -n 10 ./build_fpga_4c/build.log Check if the build is still running by looking for quartus_sh, quartus_syn, or quartus_fit programs. - $ ps -u `username` + $ ps -u *username* If the build fails and you need to restart it, clean up the build folder using the following command: - $ make clean-fpga-*# of cores*c + $ make clean-fpga- *# of cores* c Example: `make clean-fpga-4c` The file `vortex_afu.gbs` should exist when the build is done: - $ ls -lsa ./build_fpga_*# of cores*c/vortex_afu.gbs + $ ls -lsa ./build_fpga_ *# of cores* c/vortex_afu.gbs Signing the bitstream and Programming the FPGA diff --git a/doc/Simulation.md b/doc/Simulation.md new file mode 100644 index 00000000..1d3cdb17 --- /dev/null +++ b/doc/Simulation.md @@ -0,0 +1,36 @@ +# Vortex Simulation Methods + +### RTL Simulation + +[Verilator] (https://www.veripool.org/projects/verilator/wiki) is a Verilog/SystemVerilog design simulator that converts the Verilog HDL to single- or mult-ithreaded C++/SystemC code to perform the design simulation. An installation guide for Verilator is located [here.] (https://www.veripool.org/projects/verilator/wiki/Installing) + +### Cycle-Approximate Simulation + +SimX is a C++ cycle-level in-house simulator developed for Vortex. The relevant files are located in the `simX` folder. + +### FGPA Simulation + +The current target FPGA for simulation is the Arria10 Intel Accelerator Card v1.0. The guide to build the fpga with specific configurations is located [here.] (https://github.com/vortexgpgpu/vortex-dev/blob/master/doc/Flubber_FPGA_Startup_Guide.md) + +### How to Test + +Running tests under specific drivers (rtlsim,simx,fpga) is done using the script named `blackbox.sh` located in the `ci` folder. Running command `./ci/blackbox.sh --help` from the Vortex root directory will display the following command line arguments for `blackbox.sh`: + +- *Clusters* - used to specify the number of clusters (collection of processing elements) within a configuration. +- *Cores* - used to specify the number of cores (processing element containing multiple warps) within a configuration. +- *Warps* - used to specify the number of warps (collection of concurrent hardware threads) within a configuration. +- *Threads* - used to specify the number of threads (smallest unit of computation) within a configuration. +- *L2cache* - used to enable the shard l2cache among the Vortex cores. +- *L3cache* - used to enable the shared l3cache among the Vortex clusters. +- *Driver* - used to specify which driver to run the Vortex simulation (either rtlsim, vlsim, fpga, or simx). +- *Debug* - used to enable debug mode for the Vortex simulation. +- *Perf* - is used to enable the detailed performance counters within the Vortex simulation. +- *App* - is used to specify which test/benchmark to run in the Vortex simulation. The main choices are vecadd, sgemm, basic, demo, and dogfood. Other tests/benchmarks are located in the `/benchmarks/opencl` folder though not all of them work wit the current version of Vortex. +- *Args* - + +An example of using the `blackbox.sh` commandline arguments is shown below. + +Run the sgemm benchmark using the vlsim driver with a Vortex configuration of 1 cluster, 4 cores, 4 warps, and 4 threads: + + $ ./ci/blackbox.sh --clusters=1 --cores=4 --warps=4 --threads=4 --driver=vlsim --app=sgemm +