diff --git a/results.txt b/results.txt new file mode 100644 index 00000000..e69de29b diff --git a/rtl/VX_fetch.v b/rtl/VX_fetch.v index d76adbab..37c35540 100644 --- a/rtl/VX_fetch.v +++ b/rtl/VX_fetch.v @@ -26,24 +26,9 @@ module VX_fetch ( ); - reg stall_reg; - reg delay_reg; - reg[31:0] old; - reg[4:0] state; - reg[31:0] real_PC; - reg[31:0] JAL_reg; - reg[31:0] BR_reg; - reg prev_debug; - - - reg delay; - reg[31:0] PC_to_use; - reg[31:0] PC_to_use_temp; reg stall; - reg[31:0] temp_PC; reg[31:0] out_PC; - reg[4:0] temp_state; - reg[4:0] tempp_state; + reg valid[`NT_M1:0]; @@ -55,14 +40,6 @@ module VX_fetch ( for (ini_cur_th = 1; ini_cur_th < `NT; ini_cur_th=ini_cur_th+1) valid[ini_cur_th] = 0; // Thread 1 active valid[0] = 1; - stall_reg = 0; - delay_reg = 0; - old = 0; - state = 0; - real_PC = 0; - JAL_reg = 0; - BR_reg = 0; - prev_debug = 0; end @@ -73,41 +50,11 @@ module VX_fetch ( end end - always @(*) begin - case(state) - 5'h00: PC_to_use_temp = real_PC; - 5'h01: PC_to_use_temp = JAL_reg; - 5'h02: PC_to_use_temp = BR_reg; - 5'h03: PC_to_use_temp = real_PC; - 5'h04: PC_to_use_temp = old; - default: PC_to_use_temp = 32'h0; - endcase // state - end - assign out_delay = 0; - assign delay = out_delay; - always @(*) begin - if ((delay_reg == 1'b1) && (in_freeze == 1'b0)) begin - // $display("Using old cuz delay: PC: %h",old); - PC_to_use = old; - end else if (in_debug == 1'b1) begin - if (prev_debug == 1'b1) begin - PC_to_use = old; - end else begin - PC_to_use = real_PC; - end - end else if (stall_reg == 1'b1) begin - // $display("Using old cuz stall: PC: %h\treal_pc: %h",old, real_PC); - PC_to_use = old; - end else begin - PC_to_use = PC_to_use_temp; - end - end - - assign stall = in_clone_stall || in_branch_stall || in_fwd_stall || in_branch_stall_exe || in_interrupt || delay || in_freeze; + assign stall = in_clone_stall || in_branch_stall || in_fwd_stall || in_branch_stall_exe || in_interrupt || in_freeze || in_debug; assign out_instruction = stall ? 32'b0 : in_instruction; // assign out_instruction = in_instruction; @@ -118,81 +65,30 @@ module VX_fetch ( endgenerate - // assign out_valid[0] = stall ? 1'b0 : valid[0]; - // assign out_valid[1] = stall ? 1'b0 : valid[1]; - always @(*) begin + wire[31:0] warp_pc; + VX_warp VX_Warp( + .clk (clk), + .reset (reset), + .stall (stall), + .in_jal (in_jal), + .in_jal_dest (in_jal_dest), + .in_branch_dir (in_branch_dir), + .in_branch_dest(in_branch_dest), + .out_PC (warp_pc) + ); - if ((in_jal == 1'b1) && (delay_reg == 1'b0)) begin - temp_PC = in_jal_dest; - // $display("in_jal_dest: %h",in_jal_dest); - end else if ((in_branch_dir == 1'b1) && (delay_reg == 1'b0)) begin - temp_PC = in_branch_dest; - end else begin - temp_PC = PC_to_use; - end - - end - assign out_PC = temp_PC; + assign out_PC = warp_pc; // always @(*) begin - // $display("FETCH PC: %h (%h, %h, %h)",temp_PC, PC_to_use, in_jal_dest, in_branch_dest); + // $display("FETCH PC: %h (%h, %h, %h)",delete, delete, in_jal_dest, in_branch_dest); // end - always @(*) begin - - if (in_jal == 1'b1) begin - temp_state = 5'h1; - end else if (in_branch_dir == 1'b1) begin - temp_state = 5'h2; - end else begin - temp_state = 5'h0; - end - end - - - - - - assign tempp_state = in_interrupt ? 5'h3 : temp_state; assign out_curr_PC = out_PC; - always @(posedge clk or posedge reset) begin - if(reset) begin - state <= 0; - stall_reg <= 0; - delay_reg <= 0; - old <= 0; - real_PC <= 0; - JAL_reg <= 0; - BR_reg <= 0; - prev_debug <= 0; - - end else begin - - if (in_debug == 1'b1) begin - state <= 5'h3; - end else begin - if (prev_debug == 1'b1) begin - state <= 5'h4; - end else begin - state <= tempp_state; - end - end - - stall_reg <= stall; - delay_reg <= delay || in_freeze; - old <= out_PC; - real_PC <= PC_to_use + 32'h4; - JAL_reg <= in_jal_dest + 32'h4; - BR_reg <= in_branch_dest + 32'h4; - prev_debug <= in_debug; - - end - end // always @(*) begin diff --git a/rtl/VX_memory.v b/rtl/VX_memory.v index ceee216f..b122a7e9 100644 --- a/rtl/VX_memory.v +++ b/rtl/VX_memory.v @@ -3,7 +3,9 @@ module VX_memory ( + /* verilator lint_off UNUSED */ input wire clk, + /* verilator lint_on UNUSED */ input wire[31:0] in_alu_result[`NT_M1:0], input wire[2:0] in_mem_read, input wire[2:0] in_mem_write, @@ -43,11 +45,11 @@ module VX_memory ( // end // end - wire[15:0] addr_0 = in_alu_result[0][31:16]; + // wire[15:0] addr_0 = in_alu_result[0][31:16]; - wire sm_valid[`NT_M1:0]; + // wire sm_valid[`NT_M1:0]; - assign sm_valid = (addr_0 != 16'hFFFF) ? in_valid : in_valid; + // assign sm_valid = (addr_0 != 16'hFFFF) ? in_valid : in_valid; // wire z_valid[`NT_M1:0]; @@ -63,21 +65,22 @@ module VX_memory ( - wire[31:0] sm_out_data[`NT_M1:0]; + // wire[31:0] sm_out_data[`NT_M1:0]; - VX_shared_memory vx_shared_memory( - .clk (clk), - .in_address (in_alu_result), - .in_mem_read (in_mem_read), - .in_mem_write(in_mem_write), - .in_valid (sm_valid), - .in_data (in_rd2), - .out_data (sm_out_data) - ); + // VX_shared_memory vx_shared_memory( + // .clk (clk), + // .in_address (in_alu_result), + // .in_mem_read (in_mem_read), + // .in_mem_write(in_mem_write), + // .in_valid (sm_valid), + // .in_data (in_rd2), + // .out_data (sm_out_data) + // ); - assign out_mem_result = sm_valid ? sm_out_data : in_cache_driver_out_data; + // assign out_mem_result = sm_valid ? sm_out_data : in_cache_driver_out_data; + assign out_mem_result = in_cache_driver_out_data; assign out_alu_result = in_alu_result; assign out_rd = in_rd; assign out_wb = in_wb; diff --git a/rtl/VX_warp.v b/rtl/VX_warp.v new file mode 100644 index 00000000..4c05005d --- /dev/null +++ b/rtl/VX_warp.v @@ -0,0 +1,44 @@ + +module VX_warp ( + input wire clk, + input wire reset, + input wire stall, + input wire in_jal, + input wire[31:0] in_jal_dest, + input wire in_branch_dir, + input wire[31:0] in_branch_dest, + + + output wire[31:0] out_PC +); + + reg[31:0] real_PC; + + initial begin + real_PC = 0; + end + + var[31:0] temp_PC; + always @(*) begin + if (in_jal == 1'b1) begin + temp_PC = in_jal_dest; + end else if (in_branch_dir == 1'b1) begin + temp_PC = in_branch_dest; + end else begin + temp_PC = real_PC; + end + end + + assign out_PC = temp_PC; + + always @(posedge clk or posedge reset) begin + if (reset) begin + real_PC <= 0; + end else if (stall != 1'b1) begin + real_PC <= temp_PC + 32'h4; + end + + end + + +endmodule \ No newline at end of file diff --git a/rtl/obj_dir/VVX_shared_memory.cpp b/rtl/obj_dir/VVX_shared_memory.cpp deleted file mode 100644 index bfc55d2f..00000000 --- a/rtl/obj_dir/VVX_shared_memory.cpp +++ /dev/null @@ -1,199 +0,0 @@ -// Verilated -*- C++ -*- -// DESCRIPTION: Verilator output: Design implementation internals -// See VVX_shared_memory.h for the primary calling header - -#include "VVX_shared_memory.h" -#include "VVX_shared_memory__Syms.h" - - -//-------------------- -// STATIC VARIABLES - - -//-------------------- - -VL_CTOR_IMP(VVX_shared_memory) { - VVX_shared_memory__Syms* __restrict vlSymsp = __VlSymsp = new VVX_shared_memory__Syms(this, name()); - VVX_shared_memory* __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp; - // Reset internal values - - // Reset structure values - _ctor_var_reset(); -} - -void VVX_shared_memory::__Vconfigure(VVX_shared_memory__Syms* vlSymsp, bool first) { - if (0 && first) {} // Prevent unused - this->__VlSymsp = vlSymsp; -} - -VVX_shared_memory::~VVX_shared_memory() { - delete __VlSymsp; __VlSymsp=NULL; -} - -//-------------------- - - -void VVX_shared_memory::eval() { - VL_DEBUG_IF(VL_DBG_MSGF("+++++TOP Evaluate VVX_shared_memory::eval\n"); ); - VVX_shared_memory__Syms* __restrict vlSymsp = this->__VlSymsp; // Setup global symbol table - VVX_shared_memory* __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp; -#ifdef VL_DEBUG - // Debug assertions - _eval_debug_assertions(); -#endif // VL_DEBUG - // Initialize - if (VL_UNLIKELY(!vlSymsp->__Vm_didInit)) _eval_initial_loop(vlSymsp); - // Evaluate till stable - int __VclockLoop = 0; - QData __Vchange = 1; - do { - VL_DEBUG_IF(VL_DBG_MSGF("+ Clock loop\n");); - _eval(vlSymsp); - if (VL_UNLIKELY(++__VclockLoop > 100)) { - // About to fail, so enable debug to see what's not settling. - // Note you must run make with OPT=-DVL_DEBUG for debug prints. - int __Vsaved_debug = Verilated::debug(); - Verilated::debug(1); - __Vchange = _change_request(vlSymsp); - Verilated::debug(__Vsaved_debug); - VL_FATAL_MT(__FILE__,__LINE__,__FILE__,"Verilated model didn't converge"); - } else { - __Vchange = _change_request(vlSymsp); - } - } while (VL_UNLIKELY(__Vchange)); -} - -void VVX_shared_memory::_eval_initial_loop(VVX_shared_memory__Syms* __restrict vlSymsp) { - vlSymsp->__Vm_didInit = true; - _eval_initial(vlSymsp); - // Evaluate till stable - int __VclockLoop = 0; - QData __Vchange = 1; - do { - _eval_settle(vlSymsp); - _eval(vlSymsp); - if (VL_UNLIKELY(++__VclockLoop > 100)) { - // About to fail, so enable debug to see what's not settling. - // Note you must run make with OPT=-DVL_DEBUG for debug prints. - int __Vsaved_debug = Verilated::debug(); - Verilated::debug(1); - __Vchange = _change_request(vlSymsp); - Verilated::debug(__Vsaved_debug); - VL_FATAL_MT(__FILE__,__LINE__,__FILE__,"Verilated model didn't DC converge"); - } else { - __Vchange = _change_request(vlSymsp); - } - } while (VL_UNLIKELY(__Vchange)); -} - -//-------------------- -// Internal Methods - -VL_INLINE_OPT void VVX_shared_memory::_sequent__TOP__1(VVX_shared_memory__Syms* __restrict vlSymsp) { - VL_DEBUG_IF(VL_DBG_MSGF("+ VVX_shared_memory::_sequent__TOP__1\n"); ); - VVX_shared_memory* __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp; - // Variables - // Begin mtask footprint all: - VL_SIG8(__Vdlyvdim0__VX_shared_memory__DOT__mem__v0,7,0); - VL_SIG8(__Vdlyvset__VX_shared_memory__DOT__mem__v0,0,0); - VL_SIG(__Vdlyvval__VX_shared_memory__DOT__mem__v0[1],31,0); - // Body - // ALWAYS at VX_shared_memory.v:27 - vlTOPp->out_data[0U] = vlTOPp->VX_shared_memory__DOT__mem - [(0xffU & (vlTOPp->in_address[0U] >> 2U))]; - __Vdlyvset__VX_shared_memory__DOT__mem__v0 = 0U; - // ALWAYS at VX_shared_memory.v:27 - if (((2U == (IData)(vlTOPp->in_mem_write)) & (vlTOPp->in_valid - & (0xffffU - == - (0xffffU - & (vlTOPp->in_address - [0U] - >> 0x10U)))))) { - __Vdlyvval__VX_shared_memory__DOT__mem__v0 - = vlTOPp->in_data; - __Vdlyvset__VX_shared_memory__DOT__mem__v0 = 1U; - __Vdlyvdim0__VX_shared_memory__DOT__mem__v0 - = (0xffU & (vlTOPp->in_address[0U] >> 2U)); - } - // ALWAYSPOST at VX_shared_memory.v:31 - if (__Vdlyvset__VX_shared_memory__DOT__mem__v0) { - vlTOPp->VX_shared_memory__DOT__mem[__Vdlyvdim0__VX_shared_memory__DOT__mem__v0] - = __Vdlyvval__VX_shared_memory__DOT__mem__v0; - } -} - -void VVX_shared_memory::_eval(VVX_shared_memory__Syms* __restrict vlSymsp) { - VL_DEBUG_IF(VL_DBG_MSGF("+ VVX_shared_memory::_eval\n"); ); - VVX_shared_memory* __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp; - // Body - if (((IData)(vlTOPp->clk) & (~ (IData)(vlTOPp->__Vclklast__TOP__clk)))) { - vlTOPp->_sequent__TOP__1(vlSymsp); - } - // Final - vlTOPp->__Vclklast__TOP__clk = vlTOPp->clk; -} - -void VVX_shared_memory::_eval_initial(VVX_shared_memory__Syms* __restrict vlSymsp) { - VL_DEBUG_IF(VL_DBG_MSGF("+ VVX_shared_memory::_eval_initial\n"); ); - VVX_shared_memory* __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp; - // Body - vlTOPp->__Vclklast__TOP__clk = vlTOPp->clk; -} - -void VVX_shared_memory::final() { - VL_DEBUG_IF(VL_DBG_MSGF("+ VVX_shared_memory::final\n"); ); - // Variables - VVX_shared_memory__Syms* __restrict vlSymsp = this->__VlSymsp; - VVX_shared_memory* __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp; -} - -void VVX_shared_memory::_eval_settle(VVX_shared_memory__Syms* __restrict vlSymsp) { - VL_DEBUG_IF(VL_DBG_MSGF("+ VVX_shared_memory::_eval_settle\n"); ); - VVX_shared_memory* __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp; -} - -VL_INLINE_OPT QData VVX_shared_memory::_change_request(VVX_shared_memory__Syms* __restrict vlSymsp) { - VL_DEBUG_IF(VL_DBG_MSGF("+ VVX_shared_memory::_change_request\n"); ); - VVX_shared_memory* __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp; - // Body - // Change detection - QData __req = false; // Logically a bool - return __req; -} - -#ifdef VL_DEBUG -void VVX_shared_memory::_eval_debug_assertions() { - VL_DEBUG_IF(VL_DBG_MSGF("+ VVX_shared_memory::_eval_debug_assertions\n"); ); - // Body - if (VL_UNLIKELY((clk & 0xfeU))) { - Verilated::overWidthError("clk");} - if (VL_UNLIKELY((in_mem_read & 0xf8U))) { - Verilated::overWidthError("in_mem_read");} - if (VL_UNLIKELY((in_mem_write & 0xf8U))) { - Verilated::overWidthError("in_mem_write");} -} -#endif // VL_DEBUG - -void VVX_shared_memory::_ctor_var_reset() { - VL_DEBUG_IF(VL_DBG_MSGF("+ VVX_shared_memory::_ctor_var_reset\n"); ); - // Body - clk = VL_RAND_RESET_I(1); - { int __Vi0=0; for (; __Vi0<1; ++__Vi0) { - in_address[__Vi0] = VL_RAND_RESET_I(32); - }} - in_mem_read = VL_RAND_RESET_I(3); - in_mem_write = VL_RAND_RESET_I(3); - { int __Vi0=0; for (; __Vi0<1; ++__Vi0) { - in_valid[__Vi0] = VL_RAND_RESET_I(1); - }} - { int __Vi0=0; for (; __Vi0<1; ++__Vi0) { - in_data[__Vi0] = VL_RAND_RESET_I(32); - }} - { int __Vi0=0; for (; __Vi0<1; ++__Vi0) { - out_data[__Vi0] = VL_RAND_RESET_I(32); - }} - { int __Vi0=0; for (; __Vi0<256; ++__Vi0) { - VX_shared_memory__DOT__mem[__Vi0] = VL_RAND_RESET_I(32); - }} -} diff --git a/rtl/obj_dir/VVX_shared_memory.h b/rtl/obj_dir/VVX_shared_memory.h deleted file mode 100644 index d146ef3e..00000000 --- a/rtl/obj_dir/VVX_shared_memory.h +++ /dev/null @@ -1,86 +0,0 @@ -// Verilated -*- C++ -*- -// DESCRIPTION: Verilator output: Primary design header -// -// This header should be included by all source files instantiating the design. -// The class here is then constructed to instantiate the design. -// See the Verilator manual for examples. - -#ifndef _VVX_shared_memory_H_ -#define _VVX_shared_memory_H_ - -#include "verilated.h" - -class VVX_shared_memory__Syms; - -//---------- - -VL_MODULE(VVX_shared_memory) { - public: - - // PORTS - // The application code writes and reads these signals to - // propagate new values into/out from the Verilated model. - // Begin mtask footprint all: - VL_IN8(clk,0,0); - VL_IN8(in_mem_read,2,0); - VL_IN8(in_mem_write,2,0); - VL_IN(in_address[1],31,0); - VL_IN8(in_valid[1],0,0); - VL_IN(in_data[1],31,0); - VL_OUT(out_data[1],31,0); - - // LOCAL SIGNALS - // Internals; generally not touched by application code - // Begin mtask footprint all: - VL_SIG(VX_shared_memory__DOT__mem[256],31,0); - - // LOCAL VARIABLES - // Internals; generally not touched by application code - // Begin mtask footprint all: - VL_SIG8(__Vclklast__TOP__clk,0,0); - - // INTERNAL VARIABLES - // Internals; generally not touched by application code - VVX_shared_memory__Syms* __VlSymsp; // Symbol table - - // PARAMETERS - // Parameters marked /*verilator public*/ for use by application code - - // CONSTRUCTORS - private: - VL_UNCOPYABLE(VVX_shared_memory); ///< Copying not allowed - public: - /// Construct the model; called by application code - /// The special name may be used to make a wrapper with a - /// single model invisible with respect to DPI scope names. - VVX_shared_memory(const char* name="TOP"); - /// Destroy the model; called (often implicitly) by application code - ~VVX_shared_memory(); - - // API METHODS - /// Evaluate the model. Application must call when inputs change. - void eval(); - /// Simulation complete, run final blocks. Application must call on completion. - void final(); - - // INTERNAL METHODS - private: - static void _eval_initial_loop(VVX_shared_memory__Syms* __restrict vlSymsp); - public: - void __Vconfigure(VVX_shared_memory__Syms* symsp, bool first); - private: - static QData _change_request(VVX_shared_memory__Syms* __restrict vlSymsp); - void _ctor_var_reset(); - public: - static void _eval(VVX_shared_memory__Syms* __restrict vlSymsp); - private: -#ifdef VL_DEBUG - void _eval_debug_assertions(); -#endif // VL_DEBUG - public: - static void _eval_initial(VVX_shared_memory__Syms* __restrict vlSymsp); - static void _eval_settle(VVX_shared_memory__Syms* __restrict vlSymsp); - static void _sequent__TOP__1(VVX_shared_memory__Syms* __restrict vlSymsp); -} VL_ATTR_ALIGNED(128); - -#endif // guard diff --git a/rtl/obj_dir/VVX_shared_memory.mk b/rtl/obj_dir/VVX_shared_memory.mk deleted file mode 100644 index 175b9344..00000000 --- a/rtl/obj_dir/VVX_shared_memory.mk +++ /dev/null @@ -1,53 +0,0 @@ -# Verilated -*- Makefile -*- -# DESCRIPTION: Verilator output: Makefile for building Verilated archive or executable -# -# Execute this makefile from the object directory: -# make -f VVX_shared_memory.mk - -default: VVX_shared_memory__ALL.a - -### Constants... -# Perl executable (from $PERL) -PERL = perl -# Path to Verilator kit (from $VERILATOR_ROOT) -VERILATOR_ROOT = /usr/local/share/verilator -# SystemC include directory with systemc.h (from $SYSTEMC_INCLUDE) -SYSTEMC_INCLUDE ?= -# SystemC library directory with libsystemc.a (from $SYSTEMC_LIBDIR) -SYSTEMC_LIBDIR ?= - -### Switches... -# SystemC output mode? 0/1 (from --sc) -VM_SC = 0 -# Legacy or SystemC output mode? 0/1 (from --sc) -VM_SP_OR_SC = $(VM_SC) -# Deprecated -VM_PCLI = 1 -# Deprecated: SystemC architecture to find link library path (from $SYSTEMC_ARCH) -VM_SC_TARGET_ARCH = linux - -### Vars... -# Design prefix (from --prefix) -VM_PREFIX = VVX_shared_memory -# Module prefix (from --prefix) -VM_MODPREFIX = VVX_shared_memory -# User CFLAGS (from -CFLAGS on Verilator command line) -VM_USER_CFLAGS = \ - -# User LDLIBS (from -LDFLAGS on Verilator command line) -VM_USER_LDLIBS = \ - -# User .cpp files (from .cpp's on Verilator command line) -VM_USER_CLASSES = \ - -# User .cpp directories (from .cpp's on Verilator command line) -VM_USER_DIR = \ - - -### Default rules... -# Include list of all generated classes -include VVX_shared_memory_classes.mk -# Include global rules -include $(VERILATOR_ROOT)/include/verilated.mk - -# Verilated -*- Makefile -*- diff --git a/rtl/obj_dir/VVX_shared_memory__Syms.cpp b/rtl/obj_dir/VVX_shared_memory__Syms.cpp deleted file mode 100644 index f6ed4851..00000000 --- a/rtl/obj_dir/VVX_shared_memory__Syms.cpp +++ /dev/null @@ -1,19 +0,0 @@ -// Verilated -*- C++ -*- -// DESCRIPTION: Verilator output: Symbol table implementation internals - -#include "VVX_shared_memory__Syms.h" -#include "VVX_shared_memory.h" - -// FUNCTIONS -VVX_shared_memory__Syms::VVX_shared_memory__Syms(VVX_shared_memory* topp, const char* namep) - // Setup locals - : __Vm_namep(namep) - , __Vm_didInit(false) - // Setup submodule names -{ - // Pointer to top level - TOPp = topp; - // Setup each module's pointers to their submodules - // Setup each module's pointer back to symbol table (for public functions) - TOPp->__Vconfigure(this, true); -} diff --git a/rtl/obj_dir/VVX_shared_memory__Syms.h b/rtl/obj_dir/VVX_shared_memory__Syms.h deleted file mode 100644 index f95e985a..00000000 --- a/rtl/obj_dir/VVX_shared_memory__Syms.h +++ /dev/null @@ -1,34 +0,0 @@ -// Verilated -*- C++ -*- -// DESCRIPTION: Verilator output: Symbol table internal header -// -// Internal details; most calling programs do not need this header - -#ifndef _VVX_shared_memory__Syms_H_ -#define _VVX_shared_memory__Syms_H_ - -#include "verilated.h" - -// INCLUDE MODULE CLASSES -#include "VVX_shared_memory.h" - -// SYMS CLASS -class VVX_shared_memory__Syms : public VerilatedSyms { - public: - - // LOCAL STATE - const char* __Vm_namep; - bool __Vm_didInit; - - // SUBCELL STATE - VVX_shared_memory* TOPp; - - // CREATORS - VVX_shared_memory__Syms(VVX_shared_memory* topp, const char* namep); - ~VVX_shared_memory__Syms() {} - - // METHODS - inline const char* name() { return __Vm_namep; } - -} VL_ATTR_ALIGNED(64); - -#endif // guard diff --git a/rtl/obj_dir/VVX_shared_memory__ver.d b/rtl/obj_dir/VVX_shared_memory__ver.d deleted file mode 100644 index 591620c4..00000000 --- a/rtl/obj_dir/VVX_shared_memory__ver.d +++ /dev/null @@ -1 +0,0 @@ -obj_dir/VVX_shared_memory.cpp obj_dir/VVX_shared_memory.h obj_dir/VVX_shared_memory.mk obj_dir/VVX_shared_memory__Syms.cpp obj_dir/VVX_shared_memory__Syms.h obj_dir/VVX_shared_memory__ver.d obj_dir/VVX_shared_memory_classes.mk : /usr/local/bin/verilator_bin /usr/local/bin/verilator_bin VX_define.v VX_shared_memory.v diff --git a/rtl/obj_dir/VVX_shared_memory__verFiles.dat b/rtl/obj_dir/VVX_shared_memory__verFiles.dat deleted file mode 100644 index 3eaecbfc..00000000 --- a/rtl/obj_dir/VVX_shared_memory__verFiles.dat +++ /dev/null @@ -1,13 +0,0 @@ -# DESCRIPTION: Verilator output: Timestamp data for --skip-identical. Delete at will. -C "VX_shared_memory.v -cc" -S 5163137 401094 1553636247 412576209 1553636247 412576209 "/usr/local/bin/verilator_bin" -S 1557 5518330 1554504720 475408052 1554504720 475408052 "VX_define.v" -S 684 5519352 1554505082 633145762 1554505082 633145762 "VX_shared_memory.v" -T 6965 5519375 1554505083 749151122 1554505083 749151122 "obj_dir/VVX_shared_memory.cpp" -T 2811 5519374 1554505083 749151122 1554505083 749151122 "obj_dir/VVX_shared_memory.h" -T 1488 5519377 1554505083 749151122 1554505083 749151122 "obj_dir/VVX_shared_memory.mk" -T 580 5519373 1554505083 749151122 1554505083 749151122 "obj_dir/VVX_shared_memory__Syms.cpp" -T 781 5519372 1554505083 749151122 1554505083 749151122 "obj_dir/VVX_shared_memory__Syms.h" -T 322 5519378 1554505083 749151122 1554505083 749151122 "obj_dir/VVX_shared_memory__ver.d" -T 0 0 1554505083 749151122 1554505083 749151122 "obj_dir/VVX_shared_memory__verFiles.dat" -T 1189 5519376 1554505083 749151122 1554505083 749151122 "obj_dir/VVX_shared_memory_classes.mk" diff --git a/rtl/obj_dir/VVX_shared_memory_classes.mk b/rtl/obj_dir/VVX_shared_memory_classes.mk deleted file mode 100644 index 51349098..00000000 --- a/rtl/obj_dir/VVX_shared_memory_classes.mk +++ /dev/null @@ -1,38 +0,0 @@ -# Verilated -*- Makefile -*- -# DESCRIPTION: Verilator output: Make include file with class lists -# -# This file lists generated Verilated files, for including in higher level makefiles. -# See VVX_shared_memory.mk for the caller. - -### Switches... -# Coverage output mode? 0/1 (from --coverage) -VM_COVERAGE = 0 -# Threaded output mode? 0/1/N threads (from --threads) -VM_THREADS = 0 -# Tracing output mode? 0/1 (from --trace) -VM_TRACE = 0 - -### Object file lists... -# Generated module classes, fast-path, compile with highest optimization -VM_CLASSES_FAST += \ - VVX_shared_memory \ - -# Generated module classes, non-fast-path, compile with low/medium optimization -VM_CLASSES_SLOW += \ - -# Generated support classes, fast-path, compile with highest optimization -VM_SUPPORT_FAST += \ - -# Generated support classes, non-fast-path, compile with low/medium optimization -VM_SUPPORT_SLOW += \ - VVX_shared_memory__Syms \ - -# Global classes, need linked once per executable, fast-path, compile with highest optimization -VM_GLOBAL_FAST += \ - verilated \ - -# Global classes, need linked once per executable, non-fast-path, compile with low/medium optimization -VM_GLOBAL_SLOW += \ - - -# Verilated -*- Makefile -*- diff --git a/rtl/obj_dir/VVortex b/rtl/obj_dir/VVortex index f3adcd11..ac08fe27 100755 Binary files a/rtl/obj_dir/VVortex and b/rtl/obj_dir/VVortex differ diff --git a/rtl/obj_dir/VVortex.cpp b/rtl/obj_dir/VVortex.cpp index 8a104a0b..eac6f82d 100644 --- a/rtl/obj_dir/VVortex.cpp +++ b/rtl/obj_dir/VVortex.cpp @@ -91,16 +91,73 @@ void VVortex::_eval_initial_loop(VVortex__Syms* __restrict vlSymsp) { //-------------------- // Internal Methods -void VVortex::_settle__TOP__1(VVortex__Syms* __restrict vlSymsp) { - VL_DEBUG_IF(VL_DBG_MSGF("+ VVortex::_settle__TOP__1\n"); ); +void VVortex::_initial__TOP__1(VVortex__Syms* __restrict vlSymsp) { + VL_DEBUG_IF(VL_DBG_MSGF("+ VVortex::_initial__TOP__1\n"); ); + VVortex* __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp; + // Body + // INITIAL at VX_warp.v:17 + vlTOPp->Vortex__DOT__vx_fetch__DOT__VX_Warp__DOT__real_PC = 0U; + // INITIAL at VX_fetch.v:39 + vlTOPp->Vortex__DOT__vx_fetch__DOT__valid[0U] = 1U; + // INITIAL at VX_decode.v:281 + vlTOPp->Vortex__DOT__vx_decode__DOT__state_stall = 0U; + // INITIAL at VX_m_w_reg.v:39 + vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__rd = 0U; + vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb = 0U; + vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__PC_next = 0U; + // INITIAL at VX_csr_handler.v:27 + vlTOPp->Vortex__DOT__vx_csr_handler__DOT__cycle = VL_ULL(0); + vlTOPp->Vortex__DOT__vx_csr_handler__DOT__instret = VL_ULL(0); + vlTOPp->Vortex__DOT__vx_csr_handler__DOT__decode_csr_address = 0U; + // INITIAL at VX_e_m_reg.v:77 + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__rd = 0U; + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__wb = 0U; + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__PC_next = 0U; + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__mem_read = 7U; + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__mem_write = 7U; + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__csr_address = 0U; + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__is_csr = 0U; + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__csr_result = 0U; + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__curr_PC = 0U; + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__branch_offset = 0U; + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__branch_type = 0U; + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__jal = 0U; + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__jal_dest = 0U; + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__a_reg_data[0U] = 0U; + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__b_reg_data[0U] = 0U; + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__valid[0U] = 0U; + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__alu_result[0U] = 0U; + // INITIAL at VX_d_e_reg.v:83 + vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__rd = 0U; + vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__a_reg_data[0U] = 0U; + vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__b_reg_data[0U] = 0U; + vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__reg_data_z[0U] = 0U; + vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__valid[0U] = 0U; + vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__valid_z[0U] = 0U; + vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op = 0U; + vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__wb = 0U; + vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__PC_next_out = 0U; + vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__rs2_src = 0U; + vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__itype_immed = 0U; + vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__mem_read = 7U; + vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__mem_write = 7U; + vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__branch_type = 0U; + vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__upper_immed = 0U; + vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__csr_address = 0U; + vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__is_csr = 0U; + vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__csr_mask = 0U; + vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__curr_PC = 0U; + vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__jal = 0U; + vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__jal_offset = 0U; +} + +void VVortex::_settle__TOP__2(VVortex__Syms* __restrict vlSymsp) { + VL_DEBUG_IF(VL_DBG_MSGF("+ VVortex::_settle__TOP__2\n"); ); VVortex* __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp; // Body vlTOPp->Vortex__DOT__vx_decode__DOT__jmprt_thread_mask[0U] = 1U; vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_cache_driver_out_data[0U] = vlTOPp->in_cache_driver_out_data[0U]; - vlTOPp->Vortex__DOT__vx_memory__DOT__sm_out_data[0U] - = vlTOPp->Vortex__DOT__vx_memory__DOT____Vcellout__vx_shared_memory__out_data - [0U]; vlTOPp->Vortex__DOT____Vcellout__vx_m_w_reg__out_valid[0U] = vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__valid [0U]; @@ -173,6 +230,72 @@ void VVortex::_settle__TOP__1(VVortex__Syms* __restrict vlSymsp) { ((0x6bU == (0x7fU & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) & (6U == (7U & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction >> 0xcU)))); + vlTOPp->Vortex__DOT__vx_writeback__DOT__out_pc_data[0U] + = vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__PC_next; + vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_writeback_PC_next[0U] + = vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__PC_next; + vlTOPp->Vortex__DOT__csr_decode_csr_data = ((0xc00U + == (IData)(vlTOPp->Vortex__DOT__vx_csr_handler__DOT__decode_csr_address)) + ? (IData)(vlTOPp->Vortex__DOT__vx_csr_handler__DOT__cycle) + : + ((0xc80U + == (IData)(vlTOPp->Vortex__DOT__vx_csr_handler__DOT__decode_csr_address)) + ? (IData)( + (vlTOPp->Vortex__DOT__vx_csr_handler__DOT__cycle + >> 0x20U)) + : + ((0xc02U + == (IData)(vlTOPp->Vortex__DOT__vx_csr_handler__DOT__decode_csr_address)) + ? (IData)(vlTOPp->Vortex__DOT__vx_csr_handler__DOT__instret) + : + ((0xc82U + == (IData)(vlTOPp->Vortex__DOT__vx_csr_handler__DOT__decode_csr_address)) + ? (IData)( + (vlTOPp->Vortex__DOT__vx_csr_handler__DOT__instret + >> 0x20U)) + : + vlTOPp->Vortex__DOT__vx_csr_handler__DOT__csr + [vlTOPp->Vortex__DOT__vx_csr_handler__DOT__decode_csr_address])))); + vlTOPp->out_cache_driver_in_mem_read = vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__mem_read; + vlTOPp->out_cache_driver_in_mem_write = vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__mem_write; + vlTOPp->Vortex__DOT____Vcellout__vx_e_m_reg__out_b_reg_data[0U] + = vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__b_reg_data + [0U]; + vlTOPp->Vortex__DOT____Vcellout__vx_e_m_reg__out_valid[0U] + = vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__valid + [0U]; + vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_memory_PC_next[0U] + = vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__PC_next; + vlTOPp->Vortex__DOT____Vcellout__vx_e_m_reg__out_alu_result[0U] + = vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__alu_result + [0U]; + vlTOPp->Vortex__DOT__execute_branch_stall = ((0U + != (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__branch_type)) + | (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__jal)); + vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_valid[0U] + = vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__valid + [0U]; + vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_execute_PC_next[0U] + = vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__PC_next_out; + vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_a_reg_data[0U] + = vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__a_reg_data + [0U]; + vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_b_reg_data[0U] + = vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__b_reg_data + [0U]; + vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_exe_fwd + = ((((0x1fU & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction + >> 0xfU)) == (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__rd)) + & (0U != (0x1fU & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction + >> 0xfU)))) & (0U != (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__wb))); + vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_exe_fwd + = ((((0x1fU & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction + >> 0x14U)) == (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__rd)) + & (0U != (0x1fU & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction + >> 0x14U)))) & (0U != (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__wb))); + vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_mem_result[0U] + = vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_cache_driver_out_data + [0U]; vlTOPp->Vortex__DOT__m_w_valid[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_m_w_reg__out_valid [0U]; vlTOPp->Vortex__DOT__f_d_valid[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_f_d_reg__out_valid @@ -316,6 +439,11 @@ void VVortex::_settle__TOP__1(VVortex__Syms* __restrict vlSymsp) { >> 0x14U))) : 0xdeadbeefU) : 0xdeadbeefU)))))); + vlTOPp->Vortex__DOT__decode_clone_stall = (((0U + == (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__state_stall)) + | (1U + != (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__state_stall))) + & (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_clone)); // ALWAYS at VX_decode.v:375 if ((0x40U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) { if ((0x20U & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) { @@ -465,6 +593,33 @@ void VVortex::_settle__TOP__1(VVortex__Syms* __restrict vlSymsp) { } vlTOPp->Vortex__DOT__decode_change_mask = ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_jalrs) | (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_jmprt)); + vlTOPp->Vortex__DOT__e_m_b_reg_data[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_e_m_reg__out_b_reg_data + [0U]; + vlTOPp->Vortex__DOT__e_m_valid[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_e_m_reg__out_valid + [0U]; + vlTOPp->Vortex__DOT__e_m_alu_result[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_e_m_reg__out_alu_result + [0U]; + vlTOPp->Vortex__DOT__d_e_valid[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_valid + [0U]; + vlTOPp->Vortex__DOT__d_e_a_reg_data[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_a_reg_data + [0U]; + vlTOPp->Vortex__DOT__d_e_b_reg_data[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_b_reg_data + [0U]; + vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_mem_fwd + = (((((0x1fU & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction + >> 0xfU)) == (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__rd)) + & (0U != (0x1fU & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction + >> 0xfU)))) & (0U != (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__wb))) + & (~ (IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_exe_fwd))); + vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_mem_fwd + = (((((0x1fU & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction + >> 0x14U)) == (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__rd)) + & (0U != (0x1fU & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction + >> 0x14U)))) & (0U + != (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__wb))) + & (~ (IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_exe_fwd))); + vlTOPp->Vortex__DOT__memory_mem_result[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_mem_result + [0U]; vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_wb_valid[0U] = vlTOPp->Vortex__DOT__m_w_valid[0U]; vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_valid[0U] @@ -558,6 +713,46 @@ void VVortex::_settle__TOP__1(VVortex__Syms* __restrict vlSymsp) { >> 0x19U))) ? 0U : 1U)))))))))); + vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_rd2[0U] + = vlTOPp->Vortex__DOT__e_m_b_reg_data[0U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_valid[0U] + = vlTOPp->Vortex__DOT__e_m_valid[0U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_alu_result[0U] + = vlTOPp->Vortex__DOT__e_m_alu_result[0U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_valid[0U] + = vlTOPp->Vortex__DOT__d_e_valid[0U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data[0U] + = vlTOPp->Vortex__DOT__d_e_a_reg_data[0U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_b_reg_data[0U] + = vlTOPp->Vortex__DOT__d_e_b_reg_data[0U]; + vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_wb_fwd + = ((((((0x1fU & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction + >> 0xfU)) == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__rd)) + & (0U != (0x1fU & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction + >> 0xfU)))) & (0U + != (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb))) + & (~ (IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_exe_fwd))) + & (~ (IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_mem_fwd))); + vlTOPp->Vortex__DOT__forwarding_fwd_stall = ((((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_exe_fwd) + | (IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_exe_fwd)) + & (2U + == (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__wb))) + | (((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_mem_fwd) + | (IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_mem_fwd)) + & (2U + == (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__wb)))); + vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_wb_fwd + = ((((((0x1fU & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction + >> 0x14U)) == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__rd)) + & (0U != (0x1fU & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction + >> 0x14U)))) & (0U + != (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb))) + & (~ (IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_exe_fwd))) + & (~ (IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_mem_fwd))); + vlTOPp->Vortex__DOT____Vcellinp__vx_m_w_reg__in_mem_result[0U] + = vlTOPp->Vortex__DOT__memory_mem_result[0U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_memory_mem_data[0U] + = vlTOPp->Vortex__DOT__memory_mem_result[0U]; vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_valid[0U] = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_valid [0U]; @@ -674,118 +869,367 @@ void VVortex::_settle__TOP__1(VVortex__Syms* __restrict vlSymsp) { } else { vlTOPp->Vortex__DOT__decode_branch_stall = 0U; } + vlTOPp->Vortex__DOT____Vcellout__vx_writeback__out_write_data[0U] + = ((3U == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb)) + ? vlTOPp->Vortex__DOT__vx_writeback__DOT__out_pc_data + [0U] : ((1U == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb)) + ? vlTOPp->Vortex__DOT____Vcellinp__vx_writeback__in_alu_result + [0U] : vlTOPp->Vortex__DOT____Vcellinp__vx_writeback__in_mem_result + [0U])); + vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_data[0U] + = vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_rd2 + [0U]; + vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_valid[0U] + = vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_valid + [0U]; + vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_valid[0U] + = vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_valid + [0U]; + vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_address[0U] + = vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_alu_result + [0U]; + // ALWAYS at VX_warp.v:22 + vlTOPp->Vortex__DOT__vx_fetch__DOT__VX_Warp__DOT__temp_PC + = ((IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__jal) + ? vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__jal_dest + : ((1U & ((4U & (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__branch_type)) + ? ((2U & (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__branch_type)) + ? ((~ (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__branch_type)) + & (~ (vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_alu_result + [0U] >> 0x1fU))) + : ((1U & (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__branch_type)) + ? (vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_alu_result + [0U] >> 0x1fU) : + (~ (vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_alu_result + [0U] >> 0x1fU)))) + : ((2U & (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__branch_type)) + ? ((1U & (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__branch_type)) + ? (vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_alu_result + [0U] >> 0x1fU) : + (0U != vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_alu_result + [0U])) : ((IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__branch_type) + & (0U == vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_alu_result + [0U]))))) + ? (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__curr_PC + + (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__branch_offset + << 1U)) : vlTOPp->Vortex__DOT__vx_fetch__DOT__VX_Warp__DOT__real_PC)); + vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_alu_result[0U] + = vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_alu_result + [0U]; + vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_valid[0U] + = vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_valid + [0U]; + vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_b_reg_data[0U] + = vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_b_reg_data + [0U]; + vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2 + = ((IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__rs2_src) + ? vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__itype_immed + : vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_b_reg_data + [0U]); + vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__stalling + = (((IData)(vlTOPp->Vortex__DOT__forwarding_fwd_stall) + | (IData)(vlTOPp->Vortex__DOT__execute_branch_stall)) + | (IData)(vlTOPp->Vortex__DOT__decode_clone_stall)); vlTOPp->Vortex__DOT__decode_valid[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_valid [0U]; + vlTOPp->Vortex__DOT__vx_fetch__DOT__stall = ((((IData)(vlTOPp->Vortex__DOT__decode_clone_stall) + | (IData)(vlTOPp->Vortex__DOT__decode_branch_stall)) + | (IData)(vlTOPp->Vortex__DOT__forwarding_fwd_stall)) + | (IData)(vlTOPp->Vortex__DOT__execute_branch_stall)); + vlTOPp->Vortex__DOT__writeback_write_data[0U] = + vlTOPp->Vortex__DOT____Vcellout__vx_writeback__out_write_data + [0U]; + vlTOPp->out_cache_driver_in_data[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_data + [0U]; + vlTOPp->out_cache_driver_in_valid[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_valid + [0U]; + vlTOPp->Vortex__DOT__memory_valid[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_valid + [0U]; + vlTOPp->out_cache_driver_in_address[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_address + [0U]; + vlTOPp->curr_PC = vlTOPp->Vortex__DOT__vx_fetch__DOT__VX_Warp__DOT__temp_PC; + vlTOPp->Vortex__DOT__memory_alu_result[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_alu_result + [0U]; + vlTOPp->Vortex__DOT__execute_valid[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_valid + [0U]; + vlTOPp->Vortex__DOT__execute_b_reg_data[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_b_reg_data + [0U]; + vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__mult_signed_result + = VL_MULS_QQQ(64,64,64, VL_EXTENDS_QI(64,32, + vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data + [0U]), + VL_EXTENDS_QI(64,32, vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2)); vlTOPp->Vortex__DOT____Vcellinp__vx_d_e_reg__in_valid[0U] = vlTOPp->Vortex__DOT__decode_valid[0U]; -} - -VL_INLINE_OPT void VVortex::_sequent__TOP__2(VVortex__Syms* __restrict vlSymsp) { - VL_DEBUG_IF(VL_DBG_MSGF("+ VVortex::_sequent__TOP__2\n"); ); - VVortex* __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp; - // Variables - // Begin mtask footprint all: - VL_SIG8(__Vdlyvset__Vortex__DOT__vx_f_d_reg__DOT__valid__v0,0,0); - VL_SIG8(__Vdlyvval__Vortex__DOT__vx_f_d_reg__DOT__valid__v1,0,0); - VL_SIG8(__Vdlyvset__Vortex__DOT__vx_f_d_reg__DOT__valid__v1,0,0); - // Body - __Vdlyvset__Vortex__DOT__vx_f_d_reg__DOT__valid__v0 = 0U; - __Vdlyvset__Vortex__DOT__vx_f_d_reg__DOT__valid__v1 = 0U; - // ALWAYS at VX_fetch.v:163 - vlTOPp->Vortex__DOT__vx_fetch__DOT__old = ((IData)(vlTOPp->reset) - ? 0U - : vlTOPp->Vortex__DOT__vx_fetch__DOT__temp_PC); - // ALWAYS at VX_fetch.v:163 - vlTOPp->Vortex__DOT__vx_fetch__DOT__BR_reg = ((IData)(vlTOPp->reset) - ? 0U + vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_write_data[0U] + = vlTOPp->Vortex__DOT__writeback_write_data + [0U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_m_w_reg__in_valid[0U] + = vlTOPp->Vortex__DOT__memory_valid[0U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_m_w_reg__in_alu_result[0U] + = vlTOPp->Vortex__DOT__memory_alu_result[0U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_memory_alu_result[0U] + = vlTOPp->Vortex__DOT__memory_alu_result[0U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_e_m_reg__in_valid[0U] + = vlTOPp->Vortex__DOT__execute_valid[0U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_e_m_reg__in_b_reg_data[0U] + = vlTOPp->Vortex__DOT__execute_b_reg_data[0U]; + // ALWAYS at VX_alu.v:48 + vlTOPp->Vortex__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__0__KET____DOT__vx_alu__out_alu_result + = ((0x10U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? ((8U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? 0U : ((4U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? ((2U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? ((1U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? ((0U == vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2) + ? vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data + [0U] : VL_MODDIV_III(32, + vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data + [0U], vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2)) + : ((0U == vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2) + ? vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data + [0U] : VL_MODDIVS_III(32, + vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data + [0U], vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2))) + : ((1U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? ((0U == vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2) + ? 0xffffffffU : + VL_DIV_III(32, + vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data + [0U], vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2)) + : ((0U == vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2) + ? 0xffffffffU : + VL_DIVS_III(32, + vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data + [0U], vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2)))) + : ((2U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? ((1U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? (IData)((((QData)((IData)( + vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data + [0U])) + * (QData)((IData)(vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2))) + >> 0x20U)) + : (IData)((((((QData)((IData)( + VL_NEGATE_I((IData)( + (1U + & (vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data + [0U] + >> 0x1fU)))))) + << 0x20U) + | (QData)((IData)( + vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data + [0U]))) + * (QData)((IData)(vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2))) + >> 0x20U))) + : ((1U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? (IData)((vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__mult_signed_result + >> 0x20U)) + : (IData)(vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__mult_signed_result))))) + : ((8U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? ((4U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? ((2U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? vlTOPp->Vortex__DOT__csr_decode_csr_data + : ((1U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? vlTOPp->Vortex__DOT__csr_decode_csr_data + : (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__curr_PC + + (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__upper_immed + << 0xcU)))) : ((2U + & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? + ((1U + & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? + (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__upper_immed + << 0xcU) : - ((IData)(4U) - + vlTOPp->Vortex__DOT__memory_branch_dest)); - // ALWAYS at VX_fetch.v:163 - vlTOPp->Vortex__DOT__vx_fetch__DOT__delay_reg = 0U; - // ALWAYS at VX_fetch.v:163 - vlTOPp->Vortex__DOT__vx_fetch__DOT__real_PC = ((IData)(vlTOPp->reset) + ((vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data + [0U] + >= vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2) ? 0U - : - ((IData)(4U) - + vlTOPp->Vortex__DOT__vx_fetch__DOT__PC_to_use)); - // ALWAYS at VX_fetch.v:163 - vlTOPp->Vortex__DOT__vx_fetch__DOT__stall_reg = - ((~ (IData)(vlTOPp->reset)) & (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__stall)); - // ALWAYS at VX_f_d_reg.v:33 - if (vlTOPp->reset) { - __Vdlyvset__Vortex__DOT__vx_f_d_reg__DOT__valid__v0 = 1U; - } else { - if ((1U & (~ ((IData)(vlTOPp->Vortex__DOT__forwarding_fwd_stall) - | (IData)(vlTOPp->Vortex__DOT__decode_clone_stall))))) { - __Vdlyvval__Vortex__DOT__vx_f_d_reg__DOT__valid__v1 - = vlTOPp->Vortex__DOT____Vcellinp__vx_f_d_reg__in_valid - [0U]; - __Vdlyvset__Vortex__DOT__vx_f_d_reg__DOT__valid__v1 = 1U; - } - } - // ALWAYS at VX_fetch.v:163 - vlTOPp->Vortex__DOT__vx_fetch__DOT__state = ((IData)(vlTOPp->reset) - ? 0U + : 0xffffffffU)) : - ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__prev_debug) - ? 4U + ((1U + & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? + (vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2 + & vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data + [0U]) : - ((IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__jal) - ? 1U + (vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data + [0U] + | vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2)))) + : ((4U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? ((2U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? ((1U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? VL_SHIFTRS_III(32,32,5, + vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data + [0U], + (0x1fU + & vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2)) + : (vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data + [0U] >> (0x1fU & vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2))) + : ((1U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? (vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data + [0U] ^ vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2) + : ((vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data + [0U] < vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2) + ? 1U : 0U))) : ((2U + & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? + ((1U + & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? + (VL_LTS_III(1,32,32, + vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data + [0U], vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2) + ? 1U + : 0U) + : + (vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data + [0U] + << + (0x1fU + & vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2))) + : + ((1U + & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) + ? + (vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data + [0U] + - vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2) + : + (vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data + [0U] + + vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2)))))); + vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_alu_result[0U] + = vlTOPp->Vortex__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__0__KET____DOT__vx_alu__out_alu_result; + vlTOPp->Vortex__DOT__execute_alu_result[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_alu_result + [0U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_e_m_reg__in_alu_result[0U] + = vlTOPp->Vortex__DOT__execute_alu_result[0U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_execute_alu_result[0U] + = vlTOPp->Vortex__DOT__execute_alu_result[0U]; + vlTOPp->Vortex__DOT____Vcellout__vx_forwarding__out_src1_fwd_data[0U] + = ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_exe_fwd) + ? ((3U == (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__wb)) + ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_execute_PC_next + [0U] : vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_execute_alu_result + [0U]) : ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_mem_fwd) + ? ((3U == (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__wb)) + ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_memory_PC_next + [0U] : ((2U == (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__wb)) + ? vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_memory_mem_data + [0U] : vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_memory_alu_result + [0U])) : ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_wb_fwd) + ? ((3U + == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb)) + ? + vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_writeback_PC_next + [0U] + : + ((2U + == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb)) + ? + vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_writeback_mem_data + [0U] : - ((IData)(vlTOPp->Vortex__DOT__memory_branch_dir) - ? 2U - : 0U)))); - // ALWAYS at VX_fetch.v:163 - vlTOPp->Vortex__DOT__vx_fetch__DOT__JAL_reg = ((IData)(vlTOPp->reset) - ? 0U + vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_writeback_alu_result + [0U])) + : vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_execute_alu_result + [0U]))); + vlTOPp->Vortex__DOT____Vcellout__vx_forwarding__out_src2_fwd_data[0U] + = ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_exe_fwd) + ? ((3U == (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__wb)) + ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_execute_PC_next + [0U] : vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_execute_alu_result + [0U]) : ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_mem_fwd) + ? ((3U == (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__wb)) + ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_memory_PC_next + [0U] : ((2U == (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__wb)) + ? vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_memory_mem_data + [0U] : vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_memory_alu_result + [0U])) : ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_wb_fwd) + ? ((3U + == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb)) + ? + vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_writeback_PC_next + [0U] + : + ((2U + == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb)) + ? + vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_writeback_mem_data + [0U] : - ((IData)(4U) - + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__jal_dest)); - // ALWAYSPOST at VX_f_d_reg.v:38 - if (__Vdlyvset__Vortex__DOT__vx_f_d_reg__DOT__valid__v0) { - vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__valid[0U] = 0U; + vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_writeback_alu_result + [0U])) + : vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_execute_alu_result + [0U]))); + vlTOPp->Vortex__DOT__forwarding_src1_fwd_data[0U] + = vlTOPp->Vortex__DOT____Vcellout__vx_forwarding__out_src1_fwd_data + [0U]; + vlTOPp->Vortex__DOT__forwarding_src2_fwd_data[0U] + = vlTOPp->Vortex__DOT____Vcellout__vx_forwarding__out_src2_fwd_data + [0U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src1_fwd_data[0U] + = vlTOPp->Vortex__DOT__forwarding_src1_fwd_data + [0U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src2_fwd_data[0U] + = vlTOPp->Vortex__DOT__forwarding_src2_fwd_data + [0U]; + vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_a_reg_data[0U] + = ((0x6fU == (0x7fU & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) + ? vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__curr_PC + : ((((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_exe_fwd) + | (IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_mem_fwd)) + | (IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_wb_fwd)) + ? vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src1_fwd_data + [0U] : vlTOPp->Vortex__DOT__vx_decode__DOT__rd1_register + [0U])); + vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_b_reg_data[0U] + = ((((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_exe_fwd) + | (IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_mem_fwd)) + | (IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_wb_fwd)) + ? vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src2_fwd_data + [0U] : vlTOPp->Vortex__DOT__vx_decode__DOT__rd2_register + [0U]); + vlTOPp->Vortex__DOT__decode_a_reg_data[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_a_reg_data + [0U]; + vlTOPp->Vortex__DOT__decode_b_reg_data[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_b_reg_data + [0U]; + vlTOPp->Vortex__DOT__vx_decode__DOT__jalrs_thread_mask[0U] + = VL_LTES_III(1,32,32, 0U, vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_b_reg_data + [0U]); + vlTOPp->Vortex__DOT____Vcellinp__vx_d_e_reg__in_a_reg_data[0U] + = vlTOPp->Vortex__DOT__decode_a_reg_data[0U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_d_e_reg__in_b_reg_data[0U] + = vlTOPp->Vortex__DOT__decode_b_reg_data[0U]; + vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_thread_mask[0U] + = ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_jalrs) + ? vlTOPp->Vortex__DOT__vx_decode__DOT__jalrs_thread_mask + [0U] : vlTOPp->Vortex__DOT__vx_decode__DOT__jmprt_thread_mask + [0U]); + vlTOPp->Vortex__DOT__decode_thread_mask[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_thread_mask + [0U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_fetch__in_thread_mask[0U] + = vlTOPp->Vortex__DOT__decode_thread_mask[0U]; + // ALWAYS at VX_fetch.v:46 + if (vlTOPp->Vortex__DOT__decode_change_mask) { + vlTOPp->Vortex__DOT__vx_fetch__DOT__valid[0U] + = vlTOPp->Vortex__DOT____Vcellinp__vx_fetch__in_thread_mask + [0U]; } - if (__Vdlyvset__Vortex__DOT__vx_f_d_reg__DOT__valid__v1) { - vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__valid[0U] - = __Vdlyvval__Vortex__DOT__vx_f_d_reg__DOT__valid__v1; - } - vlTOPp->Vortex__DOT____Vcellout__vx_f_d_reg__out_valid[0U] - = vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__valid - [0U]; - // ALWAYS at VX_fetch.v:163 - vlTOPp->Vortex__DOT__vx_fetch__DOT__prev_debug = 0U; - // ALWAYS at VX_fetch.v:92 - vlTOPp->Vortex__DOT__vx_fetch__DOT__PC_to_use = - ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__delay_reg) - ? vlTOPp->Vortex__DOT__vx_fetch__DOT__old - : ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__stall_reg) - ? vlTOPp->Vortex__DOT__vx_fetch__DOT__old - : ((0x10U & (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__state)) - ? 0U : ((8U & (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__state)) - ? 0U : ((4U & (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__state)) - ? ((2U & (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__state)) - ? 0U : ((1U - & (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__state)) - ? 0U - : vlTOPp->Vortex__DOT__vx_fetch__DOT__old)) - : ((2U & (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__state)) - ? ((1U & (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__state)) - ? vlTOPp->Vortex__DOT__vx_fetch__DOT__real_PC - : vlTOPp->Vortex__DOT__vx_fetch__DOT__BR_reg) - : ((1U & (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__state)) - ? vlTOPp->Vortex__DOT__vx_fetch__DOT__JAL_reg - : vlTOPp->Vortex__DOT__vx_fetch__DOT__real_PC))))))); - vlTOPp->Vortex__DOT__f_d_valid[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_f_d_reg__out_valid - [0U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_valid[0U] - = vlTOPp->Vortex__DOT__f_d_valid[0U]; - vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_valid[0U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_valid - [0U]; - vlTOPp->Vortex__DOT__decode_valid[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_valid + vlTOPp->Vortex__DOT____Vcellout__vx_fetch__out_valid[0U] + = ((IData)(vlTOPp->Vortex__DOT__decode_change_mask) + ? vlTOPp->Vortex__DOT____Vcellinp__vx_fetch__in_thread_mask + [0U] : ((~ (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__stall)) + & vlTOPp->Vortex__DOT__vx_fetch__DOT__valid + [0U])); + vlTOPp->Vortex__DOT__fetch_valid[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_fetch__out_valid [0U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_f_d_reg__in_valid[0U] + = vlTOPp->Vortex__DOT__fetch_valid[0U]; } VL_INLINE_OPT void VVortex::_sequent__TOP__3(VVortex__Syms* __restrict vlSymsp) { @@ -798,8 +1242,6 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__3(VVortex__Syms* __restrict vlSymsp) VL_SIG8(__Vdlyvset__Vortex__DOT__vx_decode__DOT__vx_register_file_master__DOT__registers__v0,0,0); VL_SIG8(__Vdlyvval__Vortex__DOT__vx_d_e_reg__DOT__valid__v0,0,0); VL_SIG8(__Vdlyvval__Vortex__DOT__vx_e_m_reg__DOT__valid__v0,0,0); - VL_SIG8(__Vdlyvdim0__Vortex__DOT__vx_memory__DOT__vx_shared_memory__DOT__mem__v0,7,0); - VL_SIG8(__Vdlyvset__Vortex__DOT__vx_memory__DOT__vx_shared_memory__DOT__mem__v0,0,0); VL_SIG8(__Vdlyvval__Vortex__DOT__vx_m_w_reg__DOT__valid__v0,0,0); VL_SIG8(__Vdlyvset__Vortex__DOT__vx_csr_handler__DOT__csr__v0,0,0); VL_SIG16(__Vdlyvdim0__Vortex__DOT__vx_csr_handler__DOT__csr__v0,11,0); @@ -811,20 +1253,11 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__3(VVortex__Syms* __restrict vlSymsp) VL_SIG(__Vdlyvval__Vortex__DOT__vx_e_m_reg__DOT__b_reg_data__v0,31,0); VL_SIG(__Vdlyvval__Vortex__DOT__vx_m_w_reg__DOT__alu_result__v0,31,0); VL_SIG(__Vdlyvval__Vortex__DOT__vx_m_w_reg__DOT__mem_result__v0,31,0); - VL_SIG(__Vdlyvval__Vortex__DOT__vx_memory__DOT__vx_shared_memory__DOT__mem__v0[1],31,0); // Body __Vdly__Vortex__DOT__vx_decode__DOT__state_stall = vlTOPp->Vortex__DOT__vx_decode__DOT__state_stall; - __Vdlyvset__Vortex__DOT__vx_memory__DOT__vx_shared_memory__DOT__mem__v0 = 0U; __Vdlyvset__Vortex__DOT__vx_decode__DOT__vx_register_file_master__DOT__registers__v0 = 0U; __Vdlyvset__Vortex__DOT__vx_csr_handler__DOT__csr__v0 = 0U; - // ALWAYS at VX_shared_memory.v:23 - if ((2U == (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__mem_read))) { - vlTOPp->Vortex__DOT__vx_memory__DOT____Vcellout__vx_shared_memory__out_data[0U] - = vlTOPp->Vortex__DOT__vx_memory__DOT__vx_shared_memory__DOT__mem - [(0xffU & (vlTOPp->Vortex__DOT__vx_memory__DOT____Vcellinp__vx_shared_memory__in_address - [0U] >> 2U))]; - } // ALWAYS at VX_m_w_reg.v:60 __Vdlyvval__Vortex__DOT__vx_m_w_reg__DOT__valid__v0 = vlTOPp->Vortex__DOT____Vcellinp__vx_m_w_reg__in_valid @@ -848,6 +1281,10 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__3(VVortex__Syms* __restrict vlSymsp) } } } + // ALWAYS at VX_e_m_reg.v:126 + __Vdlyvval__Vortex__DOT__vx_e_m_reg__DOT__valid__v0 + = vlTOPp->Vortex__DOT____Vcellinp__vx_e_m_reg__in_valid + [0U]; // ALWAYS at VX_m_w_reg.v:60 __Vdlyvval__Vortex__DOT__vx_m_w_reg__DOT__mem_result__v0 = vlTOPp->Vortex__DOT____Vcellinp__vx_m_w_reg__in_mem_result @@ -891,10 +1328,6 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__3(VVortex__Syms* __restrict vlSymsp) | (0x23U == (0x7fU & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction))) ? 1U : 0U)))); // ALWAYS at VX_e_m_reg.v:126 - __Vdlyvval__Vortex__DOT__vx_e_m_reg__DOT__valid__v0 - = vlTOPp->Vortex__DOT____Vcellinp__vx_e_m_reg__in_valid - [0U]; - // ALWAYS at VX_e_m_reg.v:126 vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__jal = vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__jal; // ALWAYS at VX_e_m_reg.v:126 vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__branch_type @@ -908,6 +1341,12 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__3(VVortex__Syms* __restrict vlSymsp) // ALWAYS at VX_e_m_reg.v:126 vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__curr_PC = vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__curr_PC; // ALWAYS at VX_e_m_reg.v:126 + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__mem_write + = vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__mem_write; + // ALWAYS at VX_e_m_reg.v:126 + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__mem_read + = vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__mem_read; + // ALWAYS at VX_e_m_reg.v:126 vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__jal_dest = (vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data [0U] + vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__jal_offset); @@ -916,16 +1355,6 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__3(VVortex__Syms* __restrict vlSymsp) // ALWAYS at VX_e_m_reg.v:126 vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__branch_offset = vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__itype_immed; - // ALWAYS at VX_shared_memory.v:23 - if (((2U == (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__mem_write)) - & vlTOPp->Vortex__DOT__vx_memory__DOT____Vcellinp__vx_shared_memory__in_valid)) { - __Vdlyvval__Vortex__DOT__vx_memory__DOT__vx_shared_memory__DOT__mem__v0 - = vlTOPp->Vortex__DOT__vx_memory__DOT____Vcellinp__vx_shared_memory__in_data; - __Vdlyvset__Vortex__DOT__vx_memory__DOT__vx_shared_memory__DOT__mem__v0 = 1U; - __Vdlyvdim0__Vortex__DOT__vx_memory__DOT__vx_shared_memory__DOT__mem__v0 - = (0xffU & (vlTOPp->Vortex__DOT__vx_memory__DOT____Vcellinp__vx_shared_memory__in_address - [0U] >> 2U)); - } // ALWAYS at VX_d_e_reg.v:139 __Vdlyvval__Vortex__DOT__vx_d_e_reg__DOT__a_reg_data__v0 = ((IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__stalling) @@ -958,9 +1387,6 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__3(VVortex__Syms* __restrict vlSymsp) __Vdlyvdim0__Vortex__DOT__vx_csr_handler__DOT__csr__v0 = vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__csr_address; } - vlTOPp->Vortex__DOT__vx_memory__DOT__sm_out_data[0U] - = vlTOPp->Vortex__DOT__vx_memory__DOT____Vcellout__vx_shared_memory__out_data - [0U]; // ALWAYSPOST at VX_m_w_reg.v:69 vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__valid[0U] = __Vdlyvval__Vortex__DOT__vx_m_w_reg__DOT__valid__v0; @@ -969,6 +1395,9 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__3(VVortex__Syms* __restrict vlSymsp) = __Vdlyvval__Vortex__DOT__vx_e_m_reg__DOT__b_reg_data__v0; vlTOPp->Vortex__DOT__vx_decode__DOT__state_stall = __Vdly__Vortex__DOT__vx_decode__DOT__state_stall; + // ALWAYSPOST at VX_e_m_reg.v:146 + vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__valid[0U] + = __Vdlyvval__Vortex__DOT__vx_e_m_reg__DOT__valid__v0; // ALWAYSPOST at VX_m_w_reg.v:63 vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__mem_result[0U] = __Vdlyvval__Vortex__DOT__vx_m_w_reg__DOT__mem_result__v0; @@ -978,17 +1407,9 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__3(VVortex__Syms* __restrict vlSymsp) // ALWAYSPOST at VX_e_m_reg.v:128 vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__alu_result[0U] = __Vdlyvval__Vortex__DOT__vx_e_m_reg__DOT__alu_result__v0; - // ALWAYSPOST at VX_e_m_reg.v:146 - vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__valid[0U] - = __Vdlyvval__Vortex__DOT__vx_e_m_reg__DOT__valid__v0; // ALWAYSPOST at VX_d_e_reg.v:161 vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__valid[0U] = __Vdlyvval__Vortex__DOT__vx_d_e_reg__DOT__valid__v0; - // ALWAYSPOST at VX_shared_memory.v:27 - if (__Vdlyvset__Vortex__DOT__vx_memory__DOT__vx_shared_memory__DOT__mem__v0) { - vlTOPp->Vortex__DOT__vx_memory__DOT__vx_shared_memory__DOT__mem[__Vdlyvdim0__Vortex__DOT__vx_memory__DOT__vx_shared_memory__DOT__mem__v0] - = __Vdlyvval__Vortex__DOT__vx_memory__DOT__vx_shared_memory__DOT__mem__v0; - } // ALWAYSPOST at VX_d_e_reg.v:144 vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__a_reg_data[0U] = __Vdlyvval__Vortex__DOT__vx_d_e_reg__DOT__a_reg_data__v0; @@ -1005,15 +1426,15 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__3(VVortex__Syms* __restrict vlSymsp) vlTOPp->Vortex__DOT__vx_csr_handler__DOT__csr[__Vdlyvdim0__Vortex__DOT__vx_csr_handler__DOT__csr__v0] = __Vdlyvval__Vortex__DOT__vx_csr_handler__DOT__csr__v0; } - // ALWAYS at VX_e_m_reg.v:126 - vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__mem_read - = vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__mem_read; vlTOPp->Vortex__DOT____Vcellout__vx_m_w_reg__out_valid[0U] = vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__valid [0U]; vlTOPp->Vortex__DOT____Vcellout__vx_e_m_reg__out_b_reg_data[0U] = vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__b_reg_data [0U]; + vlTOPp->Vortex__DOT____Vcellout__vx_e_m_reg__out_valid[0U] + = vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__valid + [0U]; vlTOPp->Vortex__DOT____Vcellout__vx_m_w_reg__out_mem_result[0U] = vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__mem_result [0U]; @@ -1023,9 +1444,6 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__3(VVortex__Syms* __restrict vlSymsp) vlTOPp->Vortex__DOT____Vcellout__vx_e_m_reg__out_alu_result[0U] = vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__alu_result [0U]; - vlTOPp->Vortex__DOT____Vcellout__vx_e_m_reg__out_valid[0U] - = vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__valid - [0U]; // ALWAYS at VX_d_e_reg.v:139 vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__jal = ((~ (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__stalling)) & (IData)(vlTOPp->Vortex__DOT__decode_jal)); @@ -1040,6 +1458,20 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__3(VVortex__Syms* __restrict vlSymsp) vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__curr_PC = ((IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__stalling) ? 0U : vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__curr_PC); + vlTOPp->out_cache_driver_in_mem_write = vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__mem_write; + // ALWAYS at VX_d_e_reg.v:139 + vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__mem_write + = (7U & ((IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__stalling) + ? 7U : ((0x23U == (0x7fU & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) + ? (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction + >> 0xcU) : 7U))); + vlTOPp->out_cache_driver_in_mem_read = vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__mem_read; + // ALWAYS at VX_d_e_reg.v:139 + vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__mem_read + = (7U & ((IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__stalling) + ? 7U : ((3U == (0x7fU & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) + ? (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction + >> 0xcU) : 7U))); // ALWAYS at VX_d_e_reg.v:139 vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__jal_offset = ((IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__stalling) @@ -1050,16 +1482,10 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__3(VVortex__Syms* __restrict vlSymsp) = vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__PC_next; // ALWAYS at VX_e_m_reg.v:126 vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__PC_next = vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__PC_next_out; - vlTOPp->Vortex__DOT__memory_branch_dest = (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__curr_PC - + (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__branch_offset - << 1U)); // ALWAYS at VX_d_e_reg.v:139 vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__itype_immed = ((IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__stalling) ? 0xdeadbeefU : vlTOPp->Vortex__DOT__decode_itype_immed); - // ALWAYS at VX_e_m_reg.v:126 - vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__mem_write - = vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__mem_write; vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_a_reg_data[0U] = vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__a_reg_data [0U]; @@ -1090,14 +1516,14 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__3(VVortex__Syms* __restrict vlSymsp) [0U]; vlTOPp->Vortex__DOT__e_m_b_reg_data[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_e_m_reg__out_b_reg_data [0U]; + vlTOPp->Vortex__DOT__e_m_valid[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_e_m_reg__out_valid + [0U]; vlTOPp->Vortex__DOT__m_w_mem_result[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_m_w_reg__out_mem_result [0U]; vlTOPp->Vortex__DOT__m_w_alu_result[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_m_w_reg__out_alu_result [0U]; vlTOPp->Vortex__DOT__e_m_alu_result[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_e_m_reg__out_alu_result [0U]; - vlTOPp->Vortex__DOT__e_m_valid[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_e_m_reg__out_valid - [0U]; vlTOPp->Vortex__DOT__d_e_valid[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_valid [0U]; vlTOPp->Vortex__DOT__d_e_a_reg_data[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_a_reg_data @@ -1126,17 +1552,12 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__3(VVortex__Syms* __restrict vlSymsp) : vlTOPp->Vortex__DOT__vx_csr_handler__DOT__csr [vlTOPp->Vortex__DOT__vx_csr_handler__DOT__decode_csr_address])))); - vlTOPp->out_cache_driver_in_mem_read = vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__mem_read; - // ALWAYS at VX_d_e_reg.v:139 - vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__mem_read - = (7U & ((IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__stalling) - ? 7U : ((3U == (0x7fU & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) - ? (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - >> 0xcU) : 7U))); vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_wb_valid[0U] = vlTOPp->Vortex__DOT__m_w_valid[0U]; vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_rd2[0U] = vlTOPp->Vortex__DOT__e_m_b_reg_data[0U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_valid[0U] + = vlTOPp->Vortex__DOT__e_m_valid[0U]; vlTOPp->Vortex__DOT____Vcellinp__vx_writeback__in_mem_result[0U] = vlTOPp->Vortex__DOT__m_w_mem_result[0U]; vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_writeback_mem_data[0U] @@ -1147,8 +1568,6 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__3(VVortex__Syms* __restrict vlSymsp) = vlTOPp->Vortex__DOT__m_w_alu_result[0U]; vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_alu_result[0U] = vlTOPp->Vortex__DOT__e_m_alu_result[0U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_valid[0U] - = vlTOPp->Vortex__DOT__e_m_valid[0U]; vlTOPp->Vortex__DOT__execute_branch_stall = ((0U != (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__branch_type)) | (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__jal)); @@ -1160,13 +1579,6 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__3(VVortex__Syms* __restrict vlSymsp) vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__PC_next_out = ((IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__stalling) ? 0U : ((IData)(4U) + vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__curr_PC)); - vlTOPp->out_cache_driver_in_mem_write = vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__mem_write; - // ALWAYS at VX_d_e_reg.v:139 - vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__mem_write - = (7U & ((IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__stalling) - ? 7U : ((0x23U == (0x7fU & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) - ? (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - >> 0xcU) : 7U))); vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data[0U] = vlTOPp->Vortex__DOT__d_e_a_reg_data[0U]; // ALWAYS at VX_e_m_reg.v:126 @@ -1200,12 +1612,15 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__3(VVortex__Syms* __restrict vlSymsp) & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction))) ? (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__mul_alu) : (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__temp_final_alu))); - vlTOPp->Vortex__DOT__vx_memory__DOT____Vcellinp__vx_shared_memory__in_data[0U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_rd2 - [0U]; vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_data[0U] = vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_rd2 [0U]; + vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_valid[0U] + = vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_valid + [0U]; + vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_valid[0U] + = vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_valid + [0U]; vlTOPp->Vortex__DOT____Vcellout__vx_writeback__out_write_data[0U] = ((3U == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb)) ? vlTOPp->Vortex__DOT__vx_writeback__DOT__out_pc_data @@ -1213,70 +1628,12 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__3(VVortex__Syms* __restrict vlSymsp) ? vlTOPp->Vortex__DOT____Vcellinp__vx_writeback__in_alu_result [0U] : vlTOPp->Vortex__DOT____Vcellinp__vx_writeback__in_mem_result [0U])); - vlTOPp->Vortex__DOT__vx_memory__DOT____Vcellinp__vx_shared_memory__in_address[0U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_alu_result - [0U]; vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_address[0U] = vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_alu_result [0U]; - // ALWAYS at VX_memory.v:101 - vlTOPp->Vortex__DOT__memory_branch_dir = (1U & - ((4U - & (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__branch_type)) - ? ( - (2U - & (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__branch_type)) - ? - ((~ (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__branch_type)) - & (~ - (vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_alu_result - [0U] - >> 0x1fU))) - : - ((1U - & (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__branch_type)) - ? - (vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_alu_result - [0U] - >> 0x1fU) - : - (~ - (vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_alu_result - [0U] - >> 0x1fU)))) - : ( - (2U - & (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__branch_type)) - ? - ((1U - & (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__branch_type)) - ? - (vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_alu_result - [0U] - >> 0x1fU) - : - (0U - != - vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_alu_result - [0U])) - : - ((IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__branch_type) - & (0U - == - vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_alu_result - [0U]))))); vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_alu_result[0U] = vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_alu_result [0U]; - vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_valid[0U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_valid - [0U]; - vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_valid[0U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_valid - [0U]; - vlTOPp->Vortex__DOT__vx_memory__DOT__sm_valid[0U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_valid - [0U]; vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_valid[0U] = vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_valid [0U]; @@ -1290,6 +1647,10 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__3(VVortex__Syms* __restrict vlSymsp) [0U]); vlTOPp->out_cache_driver_in_data[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_data [0U]; + vlTOPp->out_cache_driver_in_valid[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_valid + [0U]; + vlTOPp->Vortex__DOT__memory_valid[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_valid + [0U]; vlTOPp->Vortex__DOT__writeback_write_data[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_writeback__out_write_data [0U]; @@ -1297,13 +1658,6 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__3(VVortex__Syms* __restrict vlSymsp) [0U]; vlTOPp->Vortex__DOT__memory_alu_result[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_alu_result [0U]; - vlTOPp->out_cache_driver_in_valid[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_valid - [0U]; - vlTOPp->Vortex__DOT__memory_valid[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_valid - [0U]; - vlTOPp->Vortex__DOT__vx_memory__DOT____Vcellinp__vx_shared_memory__in_valid[0U] - = vlTOPp->Vortex__DOT__vx_memory__DOT__sm_valid - [0U]; vlTOPp->Vortex__DOT__execute_valid[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_valid [0U]; vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_execute_PC_next[0U] @@ -1368,6 +1722,8 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__3(VVortex__Syms* __restrict vlSymsp) vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data [0U]), VL_EXTENDS_QI(64,32, vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2)); + vlTOPp->Vortex__DOT____Vcellinp__vx_m_w_reg__in_valid[0U] + = vlTOPp->Vortex__DOT__memory_valid[0U]; vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_write_data[0U] = vlTOPp->Vortex__DOT__writeback_write_data [0U]; @@ -1375,8 +1731,6 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__3(VVortex__Syms* __restrict vlSymsp) = vlTOPp->Vortex__DOT__memory_alu_result[0U]; vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_memory_alu_result[0U] = vlTOPp->Vortex__DOT__memory_alu_result[0U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_m_w_reg__in_valid[0U] - = vlTOPp->Vortex__DOT__memory_valid[0U]; vlTOPp->Vortex__DOT____Vcellinp__vx_e_m_reg__in_valid[0U] = vlTOPp->Vortex__DOT__execute_valid[0U]; vlTOPp->Vortex__DOT____Vcellinp__vx_e_m_reg__in_b_reg_data[0U] @@ -1518,17 +1872,107 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__3(VVortex__Syms* __restrict vlSymsp) = vlTOPp->Vortex__DOT__execute_alu_result[0U]; } -VL_INLINE_OPT void VVortex::_combo__TOP__4(VVortex__Syms* __restrict vlSymsp) { - VL_DEBUG_IF(VL_DBG_MSGF("+ VVortex::_combo__TOP__4\n"); ); +VL_INLINE_OPT void VVortex::_sequent__TOP__4(VVortex__Syms* __restrict vlSymsp) { + VL_DEBUG_IF(VL_DBG_MSGF("+ VVortex::_sequent__TOP__4\n"); ); + VVortex* __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp; + // Variables + // Begin mtask footprint all: + VL_SIG8(__Vdlyvset__Vortex__DOT__vx_f_d_reg__DOT__valid__v0,0,0); + VL_SIG8(__Vdlyvval__Vortex__DOT__vx_f_d_reg__DOT__valid__v1,0,0); + VL_SIG8(__Vdlyvset__Vortex__DOT__vx_f_d_reg__DOT__valid__v1,0,0); + // Body + __Vdlyvset__Vortex__DOT__vx_f_d_reg__DOT__valid__v0 = 0U; + __Vdlyvset__Vortex__DOT__vx_f_d_reg__DOT__valid__v1 = 0U; + // ALWAYS at VX_warp.v:34 + if (vlTOPp->reset) { + vlTOPp->Vortex__DOT__vx_fetch__DOT__VX_Warp__DOT__real_PC = 0U; + } else { + if ((1U & (~ (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__stall)))) { + vlTOPp->Vortex__DOT__vx_fetch__DOT__VX_Warp__DOT__real_PC + = ((IData)(4U) + vlTOPp->Vortex__DOT__vx_fetch__DOT__VX_Warp__DOT__temp_PC); + } + } + // ALWAYS at VX_f_d_reg.v:33 + if (vlTOPp->reset) { + vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__curr_PC = 0U; + } else { + if ((1U & (~ ((IData)(vlTOPp->Vortex__DOT__forwarding_fwd_stall) + | (IData)(vlTOPp->Vortex__DOT__decode_clone_stall))))) { + vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__curr_PC + = vlTOPp->Vortex__DOT__vx_fetch__DOT__VX_Warp__DOT__temp_PC; + } + } + // ALWAYS at VX_f_d_reg.v:33 + if (vlTOPp->reset) { + __Vdlyvset__Vortex__DOT__vx_f_d_reg__DOT__valid__v0 = 1U; + } else { + if ((1U & (~ ((IData)(vlTOPp->Vortex__DOT__forwarding_fwd_stall) + | (IData)(vlTOPp->Vortex__DOT__decode_clone_stall))))) { + __Vdlyvval__Vortex__DOT__vx_f_d_reg__DOT__valid__v1 + = vlTOPp->Vortex__DOT____Vcellinp__vx_f_d_reg__in_valid + [0U]; + __Vdlyvset__Vortex__DOT__vx_f_d_reg__DOT__valid__v1 = 1U; + } + } + // ALWAYSPOST at VX_f_d_reg.v:38 + if (__Vdlyvset__Vortex__DOT__vx_f_d_reg__DOT__valid__v0) { + vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__valid[0U] = 0U; + } + if (__Vdlyvset__Vortex__DOT__vx_f_d_reg__DOT__valid__v1) { + vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__valid[0U] + = __Vdlyvval__Vortex__DOT__vx_f_d_reg__DOT__valid__v1; + } + // ALWAYS at VX_warp.v:22 + vlTOPp->Vortex__DOT__vx_fetch__DOT__VX_Warp__DOT__temp_PC + = ((IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__jal) + ? vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__jal_dest + : ((1U & ((4U & (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__branch_type)) + ? ((2U & (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__branch_type)) + ? ((~ (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__branch_type)) + & (~ (vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_alu_result + [0U] >> 0x1fU))) + : ((1U & (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__branch_type)) + ? (vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_alu_result + [0U] >> 0x1fU) : + (~ (vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_alu_result + [0U] >> 0x1fU)))) + : ((2U & (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__branch_type)) + ? ((1U & (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__branch_type)) + ? (vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_alu_result + [0U] >> 0x1fU) : + (0U != vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_alu_result + [0U])) : ((IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__branch_type) + & (0U == vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_alu_result + [0U]))))) + ? (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__curr_PC + + (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__branch_offset + << 1U)) : vlTOPp->Vortex__DOT__vx_fetch__DOT__VX_Warp__DOT__real_PC)); + vlTOPp->Vortex__DOT____Vcellout__vx_f_d_reg__out_valid[0U] + = vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__valid + [0U]; + vlTOPp->curr_PC = vlTOPp->Vortex__DOT__vx_fetch__DOT__VX_Warp__DOT__temp_PC; + vlTOPp->Vortex__DOT__f_d_valid[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_f_d_reg__out_valid + [0U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_valid[0U] + = vlTOPp->Vortex__DOT__f_d_valid[0U]; + vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_valid[0U] + = vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_valid + [0U]; + vlTOPp->Vortex__DOT__decode_valid[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_valid + [0U]; + vlTOPp->Vortex__DOT____Vcellinp__vx_d_e_reg__in_valid[0U] + = vlTOPp->Vortex__DOT__decode_valid[0U]; +} + +VL_INLINE_OPT void VVortex::_combo__TOP__5(VVortex__Syms* __restrict vlSymsp) { + VL_DEBUG_IF(VL_DBG_MSGF("+ VVortex::_combo__TOP__5\n"); ); VVortex* __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp; // Body vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_cache_driver_out_data[0U] = vlTOPp->in_cache_driver_out_data[0U]; vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_mem_result[0U] - = (vlTOPp->Vortex__DOT__vx_memory__DOT__sm_valid - ? vlTOPp->Vortex__DOT__vx_memory__DOT__sm_out_data - [0U] : vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_cache_driver_out_data - [0U]); + = vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_cache_driver_out_data + [0U]; vlTOPp->Vortex__DOT__memory_mem_result[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_mem_result [0U]; vlTOPp->Vortex__DOT____Vcellinp__vx_m_w_reg__in_mem_result[0U] @@ -1537,8 +1981,8 @@ VL_INLINE_OPT void VVortex::_combo__TOP__4(VVortex__Syms* __restrict vlSymsp) { = vlTOPp->Vortex__DOT__memory_mem_result[0U]; } -VL_INLINE_OPT void VVortex::_sequent__TOP__5(VVortex__Syms* __restrict vlSymsp) { - VL_DEBUG_IF(VL_DBG_MSGF("+ VVortex::_sequent__TOP__5\n"); ); +VL_INLINE_OPT void VVortex::_sequent__TOP__6(VVortex__Syms* __restrict vlSymsp) { + VL_DEBUG_IF(VL_DBG_MSGF("+ VVortex::_sequent__TOP__6\n"); ); VVortex* __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp; // Body // ALWAYS at VX_register_file.v:46 @@ -1557,88 +2001,10 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__5(VVortex__Syms* __restrict vlSymsp) = vlTOPp->Vortex__DOT__vx_decode__DOT____Vcellout__vx_register_file_master__out_src2_data; } -void VVortex::_initial__TOP__6(VVortex__Syms* __restrict vlSymsp) { - VL_DEBUG_IF(VL_DBG_MSGF("+ VVortex::_initial__TOP__6\n"); ); - VVortex* __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp; - // Body - // INITIAL at VX_decode.v:281 - vlTOPp->Vortex__DOT__vx_decode__DOT__state_stall = 0U; - // INITIAL at VX_fetch.v:54 - vlTOPp->Vortex__DOT__vx_fetch__DOT__valid[0U] = 1U; - vlTOPp->Vortex__DOT__vx_fetch__DOT__stall_reg = 0U; - vlTOPp->Vortex__DOT__vx_fetch__DOT__delay_reg = 0U; - vlTOPp->Vortex__DOT__vx_fetch__DOT__old = 0U; - vlTOPp->Vortex__DOT__vx_fetch__DOT__state = 0U; - vlTOPp->Vortex__DOT__vx_fetch__DOT__real_PC = 0U; - vlTOPp->Vortex__DOT__vx_fetch__DOT__JAL_reg = 0U; - vlTOPp->Vortex__DOT__vx_fetch__DOT__BR_reg = 0U; - vlTOPp->Vortex__DOT__vx_fetch__DOT__prev_debug = 0U; - // INITIAL at VX_m_w_reg.v:39 - vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__rd = 0U; - vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb = 0U; - vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__PC_next = 0U; - // INITIAL at VX_csr_handler.v:27 - vlTOPp->Vortex__DOT__vx_csr_handler__DOT__cycle = VL_ULL(0); - vlTOPp->Vortex__DOT__vx_csr_handler__DOT__instret = VL_ULL(0); - vlTOPp->Vortex__DOT__vx_csr_handler__DOT__decode_csr_address = 0U; - // INITIAL at VX_e_m_reg.v:77 - vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__rd = 0U; - vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__wb = 0U; - vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__PC_next = 0U; - vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__mem_read = 7U; - vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__mem_write = 7U; - vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__csr_address = 0U; - vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__is_csr = 0U; - vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__csr_result = 0U; - vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__curr_PC = 0U; - vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__branch_offset = 0U; - vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__branch_type = 0U; - vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__jal = 0U; - vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__jal_dest = 0U; - vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__a_reg_data[0U] = 0U; - vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__b_reg_data[0U] = 0U; - vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__valid[0U] = 0U; - vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__alu_result[0U] = 0U; - // INITIAL at VX_d_e_reg.v:83 - vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__rd = 0U; - vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__a_reg_data[0U] = 0U; - vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__b_reg_data[0U] = 0U; - vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__reg_data_z[0U] = 0U; - vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__valid[0U] = 0U; - vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__valid_z[0U] = 0U; - vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op = 0U; - vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__wb = 0U; - vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__PC_next_out = 0U; - vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__rs2_src = 0U; - vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__itype_immed = 0U; - vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__mem_read = 7U; - vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__mem_write = 7U; - vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__branch_type = 0U; - vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__upper_immed = 0U; - vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__csr_address = 0U; - vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__is_csr = 0U; - vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__csr_mask = 0U; - vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__curr_PC = 0U; - vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__jal = 0U; - vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__jal_offset = 0U; -} - VL_INLINE_OPT void VVortex::_sequent__TOP__7(VVortex__Syms* __restrict vlSymsp) { VL_DEBUG_IF(VL_DBG_MSGF("+ VVortex::_sequent__TOP__7\n"); ); VVortex* __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp; // Body - vlTOPp->Vortex__DOT____Vcellinp__vx_d_e_reg__in_valid[0U] - = vlTOPp->Vortex__DOT__decode_valid[0U]; - // ALWAYS at VX_f_d_reg.v:33 - if (vlTOPp->reset) { - vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__curr_PC = 0U; - } else { - if ((1U & (~ ((IData)(vlTOPp->Vortex__DOT__forwarding_fwd_stall) - | (IData)(vlTOPp->Vortex__DOT__decode_clone_stall))))) { - vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__curr_PC - = vlTOPp->Vortex__DOT__vx_fetch__DOT__temp_PC; - } - } // ALWAYS at VX_f_d_reg.v:33 if (vlTOPp->reset) { vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction = 0U; @@ -1650,17 +2016,6 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__7(VVortex__Syms* __restrict vlSymsp) ? 0U : vlTOPp->fe_instruction); } } - // ALWAYS at VX_fetch.v:124 - vlTOPp->Vortex__DOT__vx_fetch__DOT__temp_PC = ( - ((IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__jal) - & (~ (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__delay_reg))) - ? vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__jal_dest - : - (((IData)(vlTOPp->Vortex__DOT__memory_branch_dir) - & (~ (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__delay_reg))) - ? vlTOPp->Vortex__DOT__memory_branch_dest - : vlTOPp->Vortex__DOT__vx_fetch__DOT__PC_to_use)); - vlTOPp->curr_PC = vlTOPp->Vortex__DOT__vx_fetch__DOT__temp_PC; vlTOPp->Vortex__DOT__vx_decode__DOT__is_itype = ((0x13U == (0x7fU & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) | (3U == (0x7fU & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction))); @@ -2257,578 +2612,8 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__7(VVortex__Syms* __restrict vlSymsp) | (IData)(vlTOPp->Vortex__DOT__execute_branch_stall)); } -void VVortex::_settle__TOP__8(VVortex__Syms* __restrict vlSymsp) { - VL_DEBUG_IF(VL_DBG_MSGF("+ VVortex::_settle__TOP__8\n"); ); - VVortex* __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp; - // Body - vlTOPp->Vortex__DOT__decode_clone_stall = (((0U - == (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__state_stall)) - | (1U - != (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__state_stall))) - & (IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_clone)); - // ALWAYS at VX_fetch.v:92 - vlTOPp->Vortex__DOT__vx_fetch__DOT__PC_to_use = - ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__delay_reg) - ? vlTOPp->Vortex__DOT__vx_fetch__DOT__old - : ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__stall_reg) - ? vlTOPp->Vortex__DOT__vx_fetch__DOT__old - : ((0x10U & (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__state)) - ? 0U : ((8U & (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__state)) - ? 0U : ((4U & (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__state)) - ? ((2U & (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__state)) - ? 0U : ((1U - & (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__state)) - ? 0U - : vlTOPp->Vortex__DOT__vx_fetch__DOT__old)) - : ((2U & (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__state)) - ? ((1U & (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__state)) - ? vlTOPp->Vortex__DOT__vx_fetch__DOT__real_PC - : vlTOPp->Vortex__DOT__vx_fetch__DOT__BR_reg) - : ((1U & (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__state)) - ? vlTOPp->Vortex__DOT__vx_fetch__DOT__JAL_reg - : vlTOPp->Vortex__DOT__vx_fetch__DOT__real_PC))))))); - vlTOPp->Vortex__DOT__vx_writeback__DOT__out_pc_data[0U] - = vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__PC_next; - vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_writeback_PC_next[0U] - = vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__PC_next; - vlTOPp->Vortex__DOT__csr_decode_csr_data = ((0xc00U - == (IData)(vlTOPp->Vortex__DOT__vx_csr_handler__DOT__decode_csr_address)) - ? (IData)(vlTOPp->Vortex__DOT__vx_csr_handler__DOT__cycle) - : - ((0xc80U - == (IData)(vlTOPp->Vortex__DOT__vx_csr_handler__DOT__decode_csr_address)) - ? (IData)( - (vlTOPp->Vortex__DOT__vx_csr_handler__DOT__cycle - >> 0x20U)) - : - ((0xc02U - == (IData)(vlTOPp->Vortex__DOT__vx_csr_handler__DOT__decode_csr_address)) - ? (IData)(vlTOPp->Vortex__DOT__vx_csr_handler__DOT__instret) - : - ((0xc82U - == (IData)(vlTOPp->Vortex__DOT__vx_csr_handler__DOT__decode_csr_address)) - ? (IData)( - (vlTOPp->Vortex__DOT__vx_csr_handler__DOT__instret - >> 0x20U)) - : - vlTOPp->Vortex__DOT__vx_csr_handler__DOT__csr - [vlTOPp->Vortex__DOT__vx_csr_handler__DOT__decode_csr_address])))); - vlTOPp->out_cache_driver_in_mem_read = vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__mem_read; - vlTOPp->out_cache_driver_in_mem_write = vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__mem_write; - vlTOPp->Vortex__DOT__memory_branch_dest = (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__curr_PC - + (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__branch_offset - << 1U)); - vlTOPp->Vortex__DOT____Vcellout__vx_e_m_reg__out_b_reg_data[0U] - = vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__b_reg_data - [0U]; - vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_memory_PC_next[0U] - = vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__PC_next; - vlTOPp->Vortex__DOT____Vcellout__vx_e_m_reg__out_alu_result[0U] - = vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__alu_result - [0U]; - vlTOPp->Vortex__DOT____Vcellout__vx_e_m_reg__out_valid[0U] - = vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__valid - [0U]; - vlTOPp->Vortex__DOT__execute_branch_stall = ((0U - != (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__branch_type)) - | (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__jal)); - vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_valid[0U] - = vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__valid - [0U]; - vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_execute_PC_next[0U] - = vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__PC_next_out; - vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_a_reg_data[0U] - = vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__a_reg_data - [0U]; - vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_b_reg_data[0U] - = vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__b_reg_data - [0U]; - vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_exe_fwd - = ((((0x1fU & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - >> 0xfU)) == (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__rd)) - & (0U != (0x1fU & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - >> 0xfU)))) & (0U != (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__wb))); - vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_exe_fwd - = ((((0x1fU & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - >> 0x14U)) == (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__rd)) - & (0U != (0x1fU & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - >> 0x14U)))) & (0U != (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__wb))); - vlTOPp->Vortex__DOT____Vcellout__vx_writeback__out_write_data[0U] - = ((3U == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb)) - ? vlTOPp->Vortex__DOT__vx_writeback__DOT__out_pc_data - [0U] : ((1U == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb)) - ? vlTOPp->Vortex__DOT____Vcellinp__vx_writeback__in_alu_result - [0U] : vlTOPp->Vortex__DOT____Vcellinp__vx_writeback__in_mem_result - [0U])); - vlTOPp->Vortex__DOT__e_m_b_reg_data[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_e_m_reg__out_b_reg_data - [0U]; - vlTOPp->Vortex__DOT__e_m_alu_result[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_e_m_reg__out_alu_result - [0U]; - vlTOPp->Vortex__DOT__e_m_valid[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_e_m_reg__out_valid - [0U]; - vlTOPp->Vortex__DOT__d_e_valid[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_valid - [0U]; - vlTOPp->Vortex__DOT__d_e_a_reg_data[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_a_reg_data - [0U]; - vlTOPp->Vortex__DOT__d_e_b_reg_data[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_d_e_reg__out_b_reg_data - [0U]; - vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_mem_fwd - = (((((0x1fU & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - >> 0xfU)) == (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__rd)) - & (0U != (0x1fU & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - >> 0xfU)))) & (0U != (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__wb))) - & (~ (IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_exe_fwd))); - vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_mem_fwd - = (((((0x1fU & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - >> 0x14U)) == (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__rd)) - & (0U != (0x1fU & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - >> 0x14U)))) & (0U - != (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__wb))) - & (~ (IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_exe_fwd))); - vlTOPp->Vortex__DOT__writeback_write_data[0U] = - vlTOPp->Vortex__DOT____Vcellout__vx_writeback__out_write_data - [0U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_rd2[0U] - = vlTOPp->Vortex__DOT__e_m_b_reg_data[0U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_alu_result[0U] - = vlTOPp->Vortex__DOT__e_m_alu_result[0U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_valid[0U] - = vlTOPp->Vortex__DOT__e_m_valid[0U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_valid[0U] - = vlTOPp->Vortex__DOT__d_e_valid[0U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data[0U] - = vlTOPp->Vortex__DOT__d_e_a_reg_data[0U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_b_reg_data[0U] - = vlTOPp->Vortex__DOT__d_e_b_reg_data[0U]; - vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_wb_fwd - = ((((((0x1fU & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - >> 0xfU)) == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__rd)) - & (0U != (0x1fU & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - >> 0xfU)))) & (0U - != (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb))) - & (~ (IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_exe_fwd))) - & (~ (IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_mem_fwd))); - vlTOPp->Vortex__DOT__forwarding_fwd_stall = ((((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_exe_fwd) - | (IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_exe_fwd)) - & (2U - == (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__wb))) - | (((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_mem_fwd) - | (IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_mem_fwd)) - & (2U - == (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__wb)))); - vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_wb_fwd - = ((((((0x1fU & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - >> 0x14U)) == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__rd)) - & (0U != (0x1fU & (vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction - >> 0x14U)))) & (0U - != (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb))) - & (~ (IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_exe_fwd))) - & (~ (IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_mem_fwd))); - vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_write_data[0U] - = vlTOPp->Vortex__DOT__writeback_write_data - [0U]; - vlTOPp->Vortex__DOT__vx_memory__DOT____Vcellinp__vx_shared_memory__in_data[0U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_rd2 - [0U]; - vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_data[0U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_rd2 - [0U]; - vlTOPp->Vortex__DOT__vx_memory__DOT____Vcellinp__vx_shared_memory__in_address[0U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_alu_result - [0U]; - vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_address[0U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_alu_result - [0U]; - // ALWAYS at VX_memory.v:101 - vlTOPp->Vortex__DOT__memory_branch_dir = (1U & - ((4U - & (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__branch_type)) - ? ( - (2U - & (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__branch_type)) - ? - ((~ (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__branch_type)) - & (~ - (vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_alu_result - [0U] - >> 0x1fU))) - : - ((1U - & (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__branch_type)) - ? - (vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_alu_result - [0U] - >> 0x1fU) - : - (~ - (vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_alu_result - [0U] - >> 0x1fU)))) - : ( - (2U - & (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__branch_type)) - ? - ((1U - & (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__branch_type)) - ? - (vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_alu_result - [0U] - >> 0x1fU) - : - (0U - != - vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_alu_result - [0U])) - : - ((IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__branch_type) - & (0U - == - vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_alu_result - [0U]))))); - vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_alu_result[0U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_alu_result - [0U]; - vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_valid[0U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_valid - [0U]; - vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_valid[0U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_valid - [0U]; - vlTOPp->Vortex__DOT__vx_memory__DOT__sm_valid[0U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_valid - [0U]; - vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_valid[0U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_valid - [0U]; - vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_b_reg_data[0U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_b_reg_data - [0U]; - vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2 - = ((IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__rs2_src) - ? vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__itype_immed - : vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_b_reg_data - [0U]); - vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__stalling - = (((IData)(vlTOPp->Vortex__DOT__forwarding_fwd_stall) - | (IData)(vlTOPp->Vortex__DOT__execute_branch_stall)) - | (IData)(vlTOPp->Vortex__DOT__decode_clone_stall)); - vlTOPp->Vortex__DOT__vx_fetch__DOT__stall = ((((IData)(vlTOPp->Vortex__DOT__decode_clone_stall) - | (IData)(vlTOPp->Vortex__DOT__decode_branch_stall)) - | (IData)(vlTOPp->Vortex__DOT__forwarding_fwd_stall)) - | (IData)(vlTOPp->Vortex__DOT__execute_branch_stall)); - vlTOPp->out_cache_driver_in_data[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_data - [0U]; - vlTOPp->out_cache_driver_in_address[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_address - [0U]; - // ALWAYS at VX_fetch.v:124 - vlTOPp->Vortex__DOT__vx_fetch__DOT__temp_PC = ( - ((IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__jal) - & (~ (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__delay_reg))) - ? vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__jal_dest - : - (((IData)(vlTOPp->Vortex__DOT__memory_branch_dir) - & (~ (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__delay_reg))) - ? vlTOPp->Vortex__DOT__memory_branch_dest - : vlTOPp->Vortex__DOT__vx_fetch__DOT__PC_to_use)); - vlTOPp->Vortex__DOT__memory_alu_result[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_alu_result - [0U]; - vlTOPp->out_cache_driver_in_valid[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_valid - [0U]; - vlTOPp->Vortex__DOT__memory_valid[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_valid - [0U]; - vlTOPp->Vortex__DOT__vx_memory__DOT____Vcellinp__vx_shared_memory__in_valid[0U] - = vlTOPp->Vortex__DOT__vx_memory__DOT__sm_valid - [0U]; - vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_mem_result[0U] - = (vlTOPp->Vortex__DOT__vx_memory__DOT__sm_valid - ? vlTOPp->Vortex__DOT__vx_memory__DOT__sm_out_data - [0U] : vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_cache_driver_out_data - [0U]); - vlTOPp->Vortex__DOT__execute_valid[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_valid - [0U]; - vlTOPp->Vortex__DOT__execute_b_reg_data[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_b_reg_data - [0U]; - vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__mult_signed_result - = VL_MULS_QQQ(64,64,64, VL_EXTENDS_QI(64,32, - vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [0U]), - VL_EXTENDS_QI(64,32, vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2)); - vlTOPp->curr_PC = vlTOPp->Vortex__DOT__vx_fetch__DOT__temp_PC; - vlTOPp->Vortex__DOT____Vcellinp__vx_m_w_reg__in_alu_result[0U] - = vlTOPp->Vortex__DOT__memory_alu_result[0U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_memory_alu_result[0U] - = vlTOPp->Vortex__DOT__memory_alu_result[0U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_m_w_reg__in_valid[0U] - = vlTOPp->Vortex__DOT__memory_valid[0U]; - vlTOPp->Vortex__DOT__memory_mem_result[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_mem_result - [0U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_e_m_reg__in_valid[0U] - = vlTOPp->Vortex__DOT__execute_valid[0U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_e_m_reg__in_b_reg_data[0U] - = vlTOPp->Vortex__DOT__execute_b_reg_data[0U]; - // ALWAYS at VX_alu.v:48 - vlTOPp->Vortex__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__0__KET____DOT__vx_alu__out_alu_result - = ((0x10U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? ((8U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? 0U : ((4U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? ((2U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? ((1U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? ((0U == vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2) - ? vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [0U] : VL_MODDIV_III(32, - vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [0U], vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2)) - : ((0U == vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2) - ? vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [0U] : VL_MODDIVS_III(32, - vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [0U], vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2))) - : ((1U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? ((0U == vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2) - ? 0xffffffffU : - VL_DIV_III(32, - vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [0U], vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2)) - : ((0U == vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2) - ? 0xffffffffU : - VL_DIVS_III(32, - vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [0U], vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2)))) - : ((2U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? ((1U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? (IData)((((QData)((IData)( - vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [0U])) - * (QData)((IData)(vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2))) - >> 0x20U)) - : (IData)((((((QData)((IData)( - VL_NEGATE_I((IData)( - (1U - & (vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [0U] - >> 0x1fU)))))) - << 0x20U) - | (QData)((IData)( - vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [0U]))) - * (QData)((IData)(vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2))) - >> 0x20U))) - : ((1U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? (IData)((vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__mult_signed_result - >> 0x20U)) - : (IData)(vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__mult_signed_result))))) - : ((8U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? ((4U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? ((2U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? vlTOPp->Vortex__DOT__csr_decode_csr_data - : ((1U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? vlTOPp->Vortex__DOT__csr_decode_csr_data - : (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__curr_PC - + (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__upper_immed - << 0xcU)))) : ((2U - & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? - ((1U - & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? - (vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__upper_immed - << 0xcU) - : - ((vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [0U] - >= vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2) - ? 0U - : 0xffffffffU)) - : - ((1U - & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? - (vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2 - & vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [0U]) - : - (vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [0U] - | vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2)))) - : ((4U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? ((2U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? ((1U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? VL_SHIFTRS_III(32,32,5, - vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [0U], - (0x1fU - & vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2)) - : (vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [0U] >> (0x1fU & vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2))) - : ((1U & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? (vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [0U] ^ vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2) - : ((vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [0U] < vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2) - ? 1U : 0U))) : ((2U - & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? - ((1U - & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? - (VL_LTS_III(1,32,32, - vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [0U], vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2) - ? 1U - : 0U) - : - (vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [0U] - << - (0x1fU - & vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2))) - : - ((1U - & (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__alu_op)) - ? - (vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [0U] - - vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2) - : - (vlTOPp->Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data - [0U] - + vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2)))))); - vlTOPp->Vortex__DOT____Vcellinp__vx_m_w_reg__in_mem_result[0U] - = vlTOPp->Vortex__DOT__memory_mem_result[0U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_memory_mem_data[0U] - = vlTOPp->Vortex__DOT__memory_mem_result[0U]; - vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_alu_result[0U] - = vlTOPp->Vortex__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__0__KET____DOT__vx_alu__out_alu_result; - vlTOPp->Vortex__DOT__execute_alu_result[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_execute__out_alu_result - [0U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_e_m_reg__in_alu_result[0U] - = vlTOPp->Vortex__DOT__execute_alu_result[0U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_execute_alu_result[0U] - = vlTOPp->Vortex__DOT__execute_alu_result[0U]; - vlTOPp->Vortex__DOT____Vcellout__vx_forwarding__out_src1_fwd_data[0U] - = ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_exe_fwd) - ? ((3U == (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__wb)) - ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_execute_PC_next - [0U] : vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_execute_alu_result - [0U]) : ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_mem_fwd) - ? ((3U == (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__wb)) - ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_memory_PC_next - [0U] : ((2U == (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__wb)) - ? vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_memory_mem_data - [0U] : vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_memory_alu_result - [0U])) : ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_wb_fwd) - ? ((3U - == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb)) - ? - vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_writeback_PC_next - [0U] - : - ((2U - == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb)) - ? - vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_writeback_mem_data - [0U] - : - vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_writeback_alu_result - [0U])) - : vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_execute_alu_result - [0U]))); - vlTOPp->Vortex__DOT____Vcellout__vx_forwarding__out_src2_fwd_data[0U] - = ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_exe_fwd) - ? ((3U == (IData)(vlTOPp->Vortex__DOT__vx_d_e_reg__DOT__wb)) - ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_execute_PC_next - [0U] : vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_execute_alu_result - [0U]) : ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_mem_fwd) - ? ((3U == (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__wb)) - ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_memory_PC_next - [0U] : ((2U == (IData)(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__wb)) - ? vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_memory_mem_data - [0U] : vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_memory_alu_result - [0U])) : ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_wb_fwd) - ? ((3U - == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb)) - ? - vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_writeback_PC_next - [0U] - : - ((2U - == (IData)(vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__wb)) - ? - vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_writeback_mem_data - [0U] - : - vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_writeback_alu_result - [0U])) - : vlTOPp->Vortex__DOT____Vcellinp__vx_forwarding__in_execute_alu_result - [0U]))); - vlTOPp->Vortex__DOT__forwarding_src1_fwd_data[0U] - = vlTOPp->Vortex__DOT____Vcellout__vx_forwarding__out_src1_fwd_data - [0U]; - vlTOPp->Vortex__DOT__forwarding_src2_fwd_data[0U] - = vlTOPp->Vortex__DOT____Vcellout__vx_forwarding__out_src2_fwd_data - [0U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src1_fwd_data[0U] - = vlTOPp->Vortex__DOT__forwarding_src1_fwd_data - [0U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src2_fwd_data[0U] - = vlTOPp->Vortex__DOT__forwarding_src2_fwd_data - [0U]; - vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_a_reg_data[0U] - = ((0x6fU == (0x7fU & vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__instruction)) - ? vlTOPp->Vortex__DOT__vx_f_d_reg__DOT__curr_PC - : ((((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_exe_fwd) - | (IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_mem_fwd)) - | (IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_wb_fwd)) - ? vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src1_fwd_data - [0U] : vlTOPp->Vortex__DOT__vx_decode__DOT__rd1_register - [0U])); - vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_b_reg_data[0U] - = ((((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_exe_fwd) - | (IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_mem_fwd)) - | (IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_wb_fwd)) - ? vlTOPp->Vortex__DOT____Vcellinp__vx_decode__in_src2_fwd_data - [0U] : vlTOPp->Vortex__DOT__vx_decode__DOT__rd2_register - [0U]); - vlTOPp->Vortex__DOT__decode_a_reg_data[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_a_reg_data - [0U]; - vlTOPp->Vortex__DOT__decode_b_reg_data[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_b_reg_data - [0U]; - vlTOPp->Vortex__DOT__vx_decode__DOT__jalrs_thread_mask[0U] - = VL_LTES_III(1,32,32, 0U, vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_b_reg_data - [0U]); - vlTOPp->Vortex__DOT____Vcellinp__vx_d_e_reg__in_a_reg_data[0U] - = vlTOPp->Vortex__DOT__decode_a_reg_data[0U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_d_e_reg__in_b_reg_data[0U] - = vlTOPp->Vortex__DOT__decode_b_reg_data[0U]; - vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_thread_mask[0U] - = ((IData)(vlTOPp->Vortex__DOT__vx_decode__DOT__is_jalrs) - ? vlTOPp->Vortex__DOT__vx_decode__DOT__jalrs_thread_mask - [0U] : vlTOPp->Vortex__DOT__vx_decode__DOT__jmprt_thread_mask - [0U]); - vlTOPp->Vortex__DOT__decode_thread_mask[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_decode__out_thread_mask - [0U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_fetch__in_thread_mask[0U] - = vlTOPp->Vortex__DOT__decode_thread_mask[0U]; - // ALWAYS at VX_fetch.v:69 - if (vlTOPp->Vortex__DOT__decode_change_mask) { - vlTOPp->Vortex__DOT__vx_fetch__DOT__valid[0U] - = vlTOPp->Vortex__DOT____Vcellinp__vx_fetch__in_thread_mask - [0U]; - } - vlTOPp->Vortex__DOT____Vcellout__vx_fetch__out_valid[0U] - = ((IData)(vlTOPp->Vortex__DOT__decode_change_mask) - ? vlTOPp->Vortex__DOT____Vcellinp__vx_fetch__in_thread_mask - [0U] : ((~ (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__stall)) - & vlTOPp->Vortex__DOT__vx_fetch__DOT__valid - [0U])); - vlTOPp->Vortex__DOT__fetch_valid[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_fetch__out_valid - [0U]; - vlTOPp->Vortex__DOT____Vcellinp__vx_f_d_reg__in_valid[0U] - = vlTOPp->Vortex__DOT__fetch_valid[0U]; -} - -VL_INLINE_OPT void VVortex::_combo__TOP__9(VVortex__Syms* __restrict vlSymsp) { - VL_DEBUG_IF(VL_DBG_MSGF("+ VVortex::_combo__TOP__9\n"); ); +VL_INLINE_OPT void VVortex::_combo__TOP__8(VVortex__Syms* __restrict vlSymsp) { + VL_DEBUG_IF(VL_DBG_MSGF("+ VVortex::_combo__TOP__8\n"); ); VVortex* __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp; // Body vlTOPp->Vortex__DOT____Vcellout__vx_forwarding__out_src1_fwd_data[0U] @@ -2935,7 +2720,7 @@ VL_INLINE_OPT void VVortex::_combo__TOP__9(VVortex__Syms* __restrict vlSymsp) { [0U]; vlTOPp->Vortex__DOT____Vcellinp__vx_fetch__in_thread_mask[0U] = vlTOPp->Vortex__DOT__decode_thread_mask[0U]; - // ALWAYS at VX_fetch.v:69 + // ALWAYS at VX_fetch.v:46 if (vlTOPp->Vortex__DOT__decode_change_mask) { vlTOPp->Vortex__DOT__vx_fetch__DOT__valid[0U] = vlTOPp->Vortex__DOT____Vcellinp__vx_fetch__in_thread_mask @@ -2957,22 +2742,22 @@ void VVortex::_eval(VVortex__Syms* __restrict vlSymsp) { VL_DEBUG_IF(VL_DBG_MSGF("+ VVortex::_eval\n"); ); VVortex* __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp; // Body - if ((((IData)(vlTOPp->clk) & (~ (IData)(vlTOPp->__Vclklast__TOP__clk))) - | ((IData)(vlTOPp->reset) & (~ (IData)(vlTOPp->__Vclklast__TOP__reset))))) { - vlTOPp->_sequent__TOP__2(vlSymsp); - } if (((IData)(vlTOPp->clk) & (~ (IData)(vlTOPp->__Vclklast__TOP__clk)))) { vlTOPp->_sequent__TOP__3(vlSymsp); } - vlTOPp->_combo__TOP__4(vlSymsp); + if ((((IData)(vlTOPp->clk) & (~ (IData)(vlTOPp->__Vclklast__TOP__clk))) + | ((IData)(vlTOPp->reset) & (~ (IData)(vlTOPp->__Vclklast__TOP__reset))))) { + vlTOPp->_sequent__TOP__4(vlSymsp); + } + vlTOPp->_combo__TOP__5(vlSymsp); if (((~ (IData)(vlTOPp->clk)) & (IData)(vlTOPp->__Vclklast__TOP__clk))) { - vlTOPp->_sequent__TOP__5(vlSymsp); + vlTOPp->_sequent__TOP__6(vlSymsp); } if ((((IData)(vlTOPp->clk) & (~ (IData)(vlTOPp->__Vclklast__TOP__clk))) | ((IData)(vlTOPp->reset) & (~ (IData)(vlTOPp->__Vclklast__TOP__reset))))) { vlTOPp->_sequent__TOP__7(vlSymsp); } - vlTOPp->_combo__TOP__9(vlSymsp); + vlTOPp->_combo__TOP__8(vlSymsp); // Final vlTOPp->__Vclklast__TOP__clk = vlTOPp->clk; vlTOPp->__Vclklast__TOP__reset = vlTOPp->reset; @@ -2982,9 +2767,9 @@ void VVortex::_eval_initial(VVortex__Syms* __restrict vlSymsp) { VL_DEBUG_IF(VL_DBG_MSGF("+ VVortex::_eval_initial\n"); ); VVortex* __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp; // Body + vlTOPp->_initial__TOP__1(vlSymsp); vlTOPp->__Vclklast__TOP__clk = vlTOPp->clk; vlTOPp->__Vclklast__TOP__reset = vlTOPp->reset; - vlTOPp->_initial__TOP__6(vlSymsp); } void VVortex::final() { @@ -2998,8 +2783,7 @@ void VVortex::_eval_settle(VVortex__Syms* __restrict vlSymsp) { VL_DEBUG_IF(VL_DBG_MSGF("+ VVortex::_eval_settle\n"); ); VVortex* __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp; // Body - vlTOPp->_settle__TOP__1(vlSymsp); - vlTOPp->_settle__TOP__8(vlSymsp); + vlTOPp->_settle__TOP__2(vlSymsp); } VL_INLINE_OPT QData VVortex::_change_request(VVortex__Syms* __restrict vlSymsp) { @@ -3097,8 +2881,6 @@ void VVortex::_ctor_var_reset() { { int __Vi0=0; for (; __Vi0<1; ++__Vi0) { Vortex__DOT__e_m_valid[__Vi0] = VL_RAND_RESET_I(1); }} - Vortex__DOT__memory_branch_dir = VL_RAND_RESET_I(1); - Vortex__DOT__memory_branch_dest = VL_RAND_RESET_I(32); { int __Vi0=0; for (; __Vi0<1; ++__Vi0) { Vortex__DOT__memory_alu_result[__Vi0] = VL_RAND_RESET_I(32); }} @@ -3299,20 +3081,12 @@ void VVortex::_ctor_var_reset() { { int __Vi0=0; for (; __Vi0<1; ++__Vi0) { Vortex__DOT____Vcellinp__vx_forwarding__in_execute_alu_result[__Vi0] = VL_RAND_RESET_I(32); }} - Vortex__DOT__vx_fetch__DOT__stall_reg = VL_RAND_RESET_I(1); - Vortex__DOT__vx_fetch__DOT__delay_reg = VL_RAND_RESET_I(1); - Vortex__DOT__vx_fetch__DOT__old = VL_RAND_RESET_I(32); - Vortex__DOT__vx_fetch__DOT__state = VL_RAND_RESET_I(5); - Vortex__DOT__vx_fetch__DOT__real_PC = VL_RAND_RESET_I(32); - Vortex__DOT__vx_fetch__DOT__JAL_reg = VL_RAND_RESET_I(32); - Vortex__DOT__vx_fetch__DOT__BR_reg = VL_RAND_RESET_I(32); - Vortex__DOT__vx_fetch__DOT__prev_debug = VL_RAND_RESET_I(1); - Vortex__DOT__vx_fetch__DOT__PC_to_use = VL_RAND_RESET_I(32); Vortex__DOT__vx_fetch__DOT__stall = VL_RAND_RESET_I(1); - Vortex__DOT__vx_fetch__DOT__temp_PC = VL_RAND_RESET_I(32); { int __Vi0=0; for (; __Vi0<1; ++__Vi0) { Vortex__DOT__vx_fetch__DOT__valid[__Vi0] = VL_RAND_RESET_I(1); }} + Vortex__DOT__vx_fetch__DOT__VX_Warp__DOT__real_PC = VL_RAND_RESET_I(32); + Vortex__DOT__vx_fetch__DOT__VX_Warp__DOT__temp_PC = VL_RAND_RESET_I(32); Vortex__DOT__vx_f_d_reg__DOT__instruction = VL_RAND_RESET_I(32); Vortex__DOT__vx_f_d_reg__DOT__curr_PC = VL_RAND_RESET_I(32); { int __Vi0=0; for (; __Vi0<1; ++__Vi0) { @@ -3404,27 +3178,6 @@ void VVortex::_ctor_var_reset() { { int __Vi0=0; for (; __Vi0<1; ++__Vi0) { Vortex__DOT__vx_e_m_reg__DOT__valid[__Vi0] = VL_RAND_RESET_I(1); }} - { int __Vi0=0; for (; __Vi0<1; ++__Vi0) { - Vortex__DOT__vx_memory__DOT__sm_valid[__Vi0] = VL_RAND_RESET_I(1); - }} - { int __Vi0=0; for (; __Vi0<1; ++__Vi0) { - Vortex__DOT__vx_memory__DOT__sm_out_data[__Vi0] = VL_RAND_RESET_I(32); - }} - { int __Vi0=0; for (; __Vi0<1; ++__Vi0) { - Vortex__DOT__vx_memory__DOT____Vcellout__vx_shared_memory__out_data[__Vi0] = VL_RAND_RESET_I(32); - }} - { int __Vi0=0; for (; __Vi0<1; ++__Vi0) { - Vortex__DOT__vx_memory__DOT____Vcellinp__vx_shared_memory__in_data[__Vi0] = VL_RAND_RESET_I(32); - }} - { int __Vi0=0; for (; __Vi0<1; ++__Vi0) { - Vortex__DOT__vx_memory__DOT____Vcellinp__vx_shared_memory__in_valid[__Vi0] = VL_RAND_RESET_I(1); - }} - { int __Vi0=0; for (; __Vi0<1; ++__Vi0) { - Vortex__DOT__vx_memory__DOT____Vcellinp__vx_shared_memory__in_address[__Vi0] = VL_RAND_RESET_I(32); - }} - { int __Vi0=0; for (; __Vi0<256; ++__Vi0) { - Vortex__DOT__vx_memory__DOT__vx_shared_memory__DOT__mem[__Vi0] = VL_RAND_RESET_I(32); - }} { int __Vi0=0; for (; __Vi0<1; ++__Vi0) { Vortex__DOT__vx_m_w_reg__DOT__alu_result[__Vi0] = VL_RAND_RESET_I(32); }} diff --git a/rtl/obj_dir/VVortex.h b/rtl/obj_dir/VVortex.h index 34c82216..87d5c4cb 100644 --- a/rtl/obj_dir/VVortex.h +++ b/rtl/obj_dir/VVortex.h @@ -43,12 +43,7 @@ VL_MODULE(VVortex) { VL_SIG8(Vortex__DOT__decode_clone_stall,0,0); VL_SIG8(Vortex__DOT__decode_change_mask,0,0); VL_SIG8(Vortex__DOT__execute_branch_stall,0,0); - VL_SIG8(Vortex__DOT__memory_branch_dir,0,0); VL_SIG8(Vortex__DOT__forwarding_fwd_stall,0,0); - VL_SIG8(Vortex__DOT__vx_fetch__DOT__stall_reg,0,0); - VL_SIG8(Vortex__DOT__vx_fetch__DOT__delay_reg,0,0); - VL_SIG8(Vortex__DOT__vx_fetch__DOT__state,4,0); - VL_SIG8(Vortex__DOT__vx_fetch__DOT__prev_debug,0,0); VL_SIG8(Vortex__DOT__vx_fetch__DOT__stall,0,0); VL_SIG8(Vortex__DOT__vx_decode__DOT__is_itype,0,0); VL_SIG8(Vortex__DOT__vx_decode__DOT__is_csr,0,0); @@ -90,19 +85,12 @@ VL_MODULE(VVortex) { VL_SIG16(Vortex__DOT__vx_csr_handler__DOT__decode_csr_address,11,0); VL_SIG(Vortex__DOT__decode_itype_immed,31,0); VL_SIG(Vortex__DOT__decode_jal_offset,31,0); - VL_SIG(Vortex__DOT__memory_branch_dest,31,0); VL_SIG(Vortex__DOT__csr_decode_csr_data,31,0); - VL_SIG(Vortex__DOT__vx_fetch__DOT__old,31,0); - VL_SIG(Vortex__DOT__vx_fetch__DOT__real_PC,31,0); - VL_SIG(Vortex__DOT__vx_fetch__DOT__JAL_reg,31,0); - VL_SIG(Vortex__DOT__vx_fetch__DOT__BR_reg,31,0); - VL_SIG(Vortex__DOT__vx_fetch__DOT__PC_to_use,31,0); - VL_SIG(Vortex__DOT__vx_fetch__DOT__temp_PC,31,0); + VL_SIG(Vortex__DOT__vx_fetch__DOT__VX_Warp__DOT__real_PC,31,0); + VL_SIG(Vortex__DOT__vx_fetch__DOT__VX_Warp__DOT__temp_PC,31,0); VL_SIG(Vortex__DOT__vx_f_d_reg__DOT__instruction,31,0); VL_SIG(Vortex__DOT__vx_f_d_reg__DOT__curr_PC,31,0); VL_SIG(Vortex__DOT__vx_d_e_reg__DOT__PC_next_out,31,0); - }; - struct { VL_SIG(Vortex__DOT__vx_d_e_reg__DOT__itype_immed,31,0); VL_SIG(Vortex__DOT__vx_d_e_reg__DOT__upper_immed,19,0); VL_SIG(Vortex__DOT__vx_d_e_reg__DOT__csr_mask,31,0); @@ -113,6 +101,8 @@ VL_MODULE(VVortex) { VL_SIG(Vortex__DOT__vx_e_m_reg__DOT__csr_result,31,0); VL_SIG(Vortex__DOT__vx_e_m_reg__DOT__curr_PC,31,0); VL_SIG(Vortex__DOT__vx_e_m_reg__DOT__branch_offset,31,0); + }; + struct { VL_SIG(Vortex__DOT__vx_e_m_reg__DOT__jal_dest,31,0); VL_SIG(Vortex__DOT__vx_m_w_reg__DOT__PC_next,31,0); VL_SIG64(Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__mult_signed_result,63,0); @@ -158,96 +148,82 @@ VL_MODULE(VVortex) { VL_SIG(Vortex__DOT__vx_e_m_reg__DOT__a_reg_data[1],31,0); VL_SIG(Vortex__DOT__vx_e_m_reg__DOT__b_reg_data[1],31,0); VL_SIG8(Vortex__DOT__vx_e_m_reg__DOT__valid[1],0,0); - VL_SIG8(Vortex__DOT__vx_memory__DOT__sm_valid[1],0,0); - VL_SIG(Vortex__DOT__vx_memory__DOT__sm_out_data[1],31,0); - VL_SIG(Vortex__DOT__vx_memory__DOT__vx_shared_memory__DOT__mem[256],31,0); VL_SIG(Vortex__DOT__vx_m_w_reg__DOT__alu_result[1],31,0); VL_SIG(Vortex__DOT__vx_m_w_reg__DOT__mem_result[1],31,0); VL_SIG8(Vortex__DOT__vx_m_w_reg__DOT__valid[1],0,0); VL_SIG(Vortex__DOT__vx_writeback__DOT__out_pc_data[1],31,0); VL_SIG(Vortex__DOT__vx_forwarding__DOT__use_execute_PC_next[1],31,0); VL_SIG(Vortex__DOT__vx_forwarding__DOT__use_memory_PC_next[1],31,0); - }; - struct { VL_SIG(Vortex__DOT__vx_forwarding__DOT__use_writeback_PC_next[1],31,0); VL_SIG16(Vortex__DOT__vx_csr_handler__DOT__csr[4096],11,0); }; // LOCAL VARIABLES // Internals; generally not touched by application code - // Anonymous structures to workaround compiler member-count bugs - struct { - // Begin mtask footprint all: - VL_SIG8(__Vtableidx1,2,0); - VL_SIG8(__Vclklast__TOP__clk,0,0); - VL_SIG8(__Vclklast__TOP__reset,0,0); - VL_SIG(Vortex__DOT__vx_decode__DOT____Vcellout__vx_register_file_master__out_src2_data,31,0); - VL_SIG(Vortex__DOT__vx_decode__DOT____Vcellout__vx_register_file_master__out_src1_data,31,0); - VL_SIG(Vortex__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__0__KET____DOT__vx_alu__out_alu_result,31,0); - VL_SIG8(Vortex__DOT____Vcellout__vx_fetch__out_valid[1],0,0); - VL_SIG8(Vortex__DOT____Vcellinp__vx_fetch__in_thread_mask[1],0,0); - VL_SIG8(Vortex__DOT____Vcellout__vx_f_d_reg__out_valid[1],0,0); - VL_SIG8(Vortex__DOT____Vcellinp__vx_f_d_reg__in_valid[1],0,0); - VL_SIG8(Vortex__DOT____Vcellout__vx_decode__out_thread_mask[1],0,0); - VL_SIG8(Vortex__DOT____Vcellout__vx_decode__out_valid[1],0,0); - VL_SIG(Vortex__DOT____Vcellout__vx_decode__out_b_reg_data[1],31,0); - VL_SIG(Vortex__DOT____Vcellout__vx_decode__out_a_reg_data[1],31,0); - VL_SIG(Vortex__DOT____Vcellinp__vx_decode__in_src2_fwd_data[1],31,0); - VL_SIG(Vortex__DOT____Vcellinp__vx_decode__in_src1_fwd_data[1],31,0); - VL_SIG8(Vortex__DOT____Vcellinp__vx_decode__in_wb_valid[1],0,0); - VL_SIG(Vortex__DOT____Vcellinp__vx_decode__in_write_data[1],31,0); - VL_SIG8(Vortex__DOT____Vcellinp__vx_decode__in_valid[1],0,0); - VL_SIG8(Vortex__DOT____Vcellout__vx_d_e_reg__out_valid[1],0,0); - VL_SIG(Vortex__DOT____Vcellout__vx_d_e_reg__out_b_reg_data[1],31,0); - VL_SIG(Vortex__DOT____Vcellout__vx_d_e_reg__out_a_reg_data[1],31,0); - VL_SIG8(Vortex__DOT____Vcellinp__vx_d_e_reg__in_valid[1],0,0); - VL_SIG(Vortex__DOT____Vcellinp__vx_d_e_reg__in_b_reg_data[1],31,0); - VL_SIG(Vortex__DOT____Vcellinp__vx_d_e_reg__in_a_reg_data[1],31,0); - VL_SIG8(Vortex__DOT____Vcellout__vx_execute__out_valid[1],0,0); - VL_SIG(Vortex__DOT____Vcellout__vx_execute__out_b_reg_data[1],31,0); - VL_SIG(Vortex__DOT____Vcellout__vx_execute__out_alu_result[1],31,0); - VL_SIG8(Vortex__DOT____Vcellinp__vx_execute__in_valid[1],0,0); - VL_SIG(Vortex__DOT____Vcellinp__vx_execute__in_b_reg_data[1],31,0); - VL_SIG(Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data[1],31,0); - VL_SIG8(Vortex__DOT____Vcellout__vx_e_m_reg__out_valid[1],0,0); - VL_SIG(Vortex__DOT____Vcellout__vx_e_m_reg__out_b_reg_data[1],31,0); - VL_SIG(Vortex__DOT____Vcellout__vx_e_m_reg__out_alu_result[1],31,0); - VL_SIG8(Vortex__DOT____Vcellinp__vx_e_m_reg__in_valid[1],0,0); - VL_SIG(Vortex__DOT____Vcellinp__vx_e_m_reg__in_b_reg_data[1],31,0); - VL_SIG(Vortex__DOT____Vcellinp__vx_e_m_reg__in_alu_result[1],31,0); - VL_SIG8(Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_valid[1],0,0); - VL_SIG(Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_data[1],31,0); - VL_SIG(Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_address[1],31,0); - VL_SIG8(Vortex__DOT____Vcellout__vx_memory__out_valid[1],0,0); - VL_SIG(Vortex__DOT____Vcellout__vx_memory__out_mem_result[1],31,0); - VL_SIG(Vortex__DOT____Vcellout__vx_memory__out_alu_result[1],31,0); - VL_SIG(Vortex__DOT____Vcellinp__vx_memory__in_cache_driver_out_data[1],31,0); - VL_SIG8(Vortex__DOT____Vcellinp__vx_memory__in_valid[1],0,0); - VL_SIG(Vortex__DOT____Vcellinp__vx_memory__in_rd2[1],31,0); - VL_SIG(Vortex__DOT____Vcellinp__vx_memory__in_alu_result[1],31,0); - VL_SIG8(Vortex__DOT____Vcellout__vx_m_w_reg__out_valid[1],0,0); - VL_SIG(Vortex__DOT____Vcellout__vx_m_w_reg__out_mem_result[1],31,0); - VL_SIG(Vortex__DOT____Vcellout__vx_m_w_reg__out_alu_result[1],31,0); - VL_SIG8(Vortex__DOT____Vcellinp__vx_m_w_reg__in_valid[1],0,0); - VL_SIG(Vortex__DOT____Vcellinp__vx_m_w_reg__in_mem_result[1],31,0); - VL_SIG(Vortex__DOT____Vcellinp__vx_m_w_reg__in_alu_result[1],31,0); - VL_SIG(Vortex__DOT____Vcellout__vx_writeback__out_write_data[1],31,0); - VL_SIG(Vortex__DOT____Vcellinp__vx_writeback__in_mem_result[1],31,0); - VL_SIG(Vortex__DOT____Vcellinp__vx_writeback__in_alu_result[1],31,0); - VL_SIG(Vortex__DOT____Vcellout__vx_forwarding__out_src2_fwd_data[1],31,0); - VL_SIG(Vortex__DOT____Vcellout__vx_forwarding__out_src1_fwd_data[1],31,0); - VL_SIG(Vortex__DOT____Vcellinp__vx_forwarding__in_writeback_mem_data[1],31,0); - VL_SIG(Vortex__DOT____Vcellinp__vx_forwarding__in_writeback_alu_result[1],31,0); - VL_SIG(Vortex__DOT____Vcellinp__vx_forwarding__in_memory_mem_data[1],31,0); - VL_SIG(Vortex__DOT____Vcellinp__vx_forwarding__in_memory_alu_result[1],31,0); - VL_SIG(Vortex__DOT____Vcellinp__vx_forwarding__in_execute_alu_result[1],31,0); - VL_SIG(Vortex__DOT__vx_memory__DOT____Vcellout__vx_shared_memory__out_data[1],31,0); - }; - struct { - VL_SIG(Vortex__DOT__vx_memory__DOT____Vcellinp__vx_shared_memory__in_data[1],31,0); - VL_SIG8(Vortex__DOT__vx_memory__DOT____Vcellinp__vx_shared_memory__in_valid[1],0,0); - VL_SIG(Vortex__DOT__vx_memory__DOT____Vcellinp__vx_shared_memory__in_address[1],31,0); - }; + // Begin mtask footprint all: + VL_SIG8(__Vtableidx1,2,0); + VL_SIG8(__Vclklast__TOP__clk,0,0); + VL_SIG8(__Vclklast__TOP__reset,0,0); + VL_SIG(Vortex__DOT__vx_decode__DOT____Vcellout__vx_register_file_master__out_src2_data,31,0); + VL_SIG(Vortex__DOT__vx_decode__DOT____Vcellout__vx_register_file_master__out_src1_data,31,0); + VL_SIG(Vortex__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__0__KET____DOT__vx_alu__out_alu_result,31,0); + VL_SIG8(Vortex__DOT____Vcellout__vx_fetch__out_valid[1],0,0); + VL_SIG8(Vortex__DOT____Vcellinp__vx_fetch__in_thread_mask[1],0,0); + VL_SIG8(Vortex__DOT____Vcellout__vx_f_d_reg__out_valid[1],0,0); + VL_SIG8(Vortex__DOT____Vcellinp__vx_f_d_reg__in_valid[1],0,0); + VL_SIG8(Vortex__DOT____Vcellout__vx_decode__out_thread_mask[1],0,0); + VL_SIG8(Vortex__DOT____Vcellout__vx_decode__out_valid[1],0,0); + VL_SIG(Vortex__DOT____Vcellout__vx_decode__out_b_reg_data[1],31,0); + VL_SIG(Vortex__DOT____Vcellout__vx_decode__out_a_reg_data[1],31,0); + VL_SIG(Vortex__DOT____Vcellinp__vx_decode__in_src2_fwd_data[1],31,0); + VL_SIG(Vortex__DOT____Vcellinp__vx_decode__in_src1_fwd_data[1],31,0); + VL_SIG8(Vortex__DOT____Vcellinp__vx_decode__in_wb_valid[1],0,0); + VL_SIG(Vortex__DOT____Vcellinp__vx_decode__in_write_data[1],31,0); + VL_SIG8(Vortex__DOT____Vcellinp__vx_decode__in_valid[1],0,0); + VL_SIG8(Vortex__DOT____Vcellout__vx_d_e_reg__out_valid[1],0,0); + VL_SIG(Vortex__DOT____Vcellout__vx_d_e_reg__out_b_reg_data[1],31,0); + VL_SIG(Vortex__DOT____Vcellout__vx_d_e_reg__out_a_reg_data[1],31,0); + VL_SIG8(Vortex__DOT____Vcellinp__vx_d_e_reg__in_valid[1],0,0); + VL_SIG(Vortex__DOT____Vcellinp__vx_d_e_reg__in_b_reg_data[1],31,0); + VL_SIG(Vortex__DOT____Vcellinp__vx_d_e_reg__in_a_reg_data[1],31,0); + VL_SIG8(Vortex__DOT____Vcellout__vx_execute__out_valid[1],0,0); + VL_SIG(Vortex__DOT____Vcellout__vx_execute__out_b_reg_data[1],31,0); + VL_SIG(Vortex__DOT____Vcellout__vx_execute__out_alu_result[1],31,0); + VL_SIG8(Vortex__DOT____Vcellinp__vx_execute__in_valid[1],0,0); + VL_SIG(Vortex__DOT____Vcellinp__vx_execute__in_b_reg_data[1],31,0); + VL_SIG(Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data[1],31,0); + VL_SIG8(Vortex__DOT____Vcellout__vx_e_m_reg__out_valid[1],0,0); + VL_SIG(Vortex__DOT____Vcellout__vx_e_m_reg__out_b_reg_data[1],31,0); + VL_SIG(Vortex__DOT____Vcellout__vx_e_m_reg__out_alu_result[1],31,0); + VL_SIG8(Vortex__DOT____Vcellinp__vx_e_m_reg__in_valid[1],0,0); + VL_SIG(Vortex__DOT____Vcellinp__vx_e_m_reg__in_b_reg_data[1],31,0); + VL_SIG(Vortex__DOT____Vcellinp__vx_e_m_reg__in_alu_result[1],31,0); + VL_SIG8(Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_valid[1],0,0); + VL_SIG(Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_data[1],31,0); + VL_SIG(Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_address[1],31,0); + VL_SIG8(Vortex__DOT____Vcellout__vx_memory__out_valid[1],0,0); + VL_SIG(Vortex__DOT____Vcellout__vx_memory__out_mem_result[1],31,0); + VL_SIG(Vortex__DOT____Vcellout__vx_memory__out_alu_result[1],31,0); + VL_SIG(Vortex__DOT____Vcellinp__vx_memory__in_cache_driver_out_data[1],31,0); + VL_SIG8(Vortex__DOT____Vcellinp__vx_memory__in_valid[1],0,0); + VL_SIG(Vortex__DOT____Vcellinp__vx_memory__in_rd2[1],31,0); + VL_SIG(Vortex__DOT____Vcellinp__vx_memory__in_alu_result[1],31,0); + VL_SIG8(Vortex__DOT____Vcellout__vx_m_w_reg__out_valid[1],0,0); + VL_SIG(Vortex__DOT____Vcellout__vx_m_w_reg__out_mem_result[1],31,0); + VL_SIG(Vortex__DOT____Vcellout__vx_m_w_reg__out_alu_result[1],31,0); + VL_SIG8(Vortex__DOT____Vcellinp__vx_m_w_reg__in_valid[1],0,0); + VL_SIG(Vortex__DOT____Vcellinp__vx_m_w_reg__in_mem_result[1],31,0); + VL_SIG(Vortex__DOT____Vcellinp__vx_m_w_reg__in_alu_result[1],31,0); + VL_SIG(Vortex__DOT____Vcellout__vx_writeback__out_write_data[1],31,0); + VL_SIG(Vortex__DOT____Vcellinp__vx_writeback__in_mem_result[1],31,0); + VL_SIG(Vortex__DOT____Vcellinp__vx_writeback__in_alu_result[1],31,0); + VL_SIG(Vortex__DOT____Vcellout__vx_forwarding__out_src2_fwd_data[1],31,0); + VL_SIG(Vortex__DOT____Vcellout__vx_forwarding__out_src1_fwd_data[1],31,0); + VL_SIG(Vortex__DOT____Vcellinp__vx_forwarding__in_writeback_mem_data[1],31,0); + VL_SIG(Vortex__DOT____Vcellinp__vx_forwarding__in_writeback_alu_result[1],31,0); + VL_SIG(Vortex__DOT____Vcellinp__vx_forwarding__in_memory_mem_data[1],31,0); + VL_SIG(Vortex__DOT____Vcellinp__vx_forwarding__in_memory_alu_result[1],31,0); + VL_SIG(Vortex__DOT____Vcellinp__vx_forwarding__in_execute_alu_result[1],31,0); static VL_ST_SIG8(__Vtable1_Vortex__DOT__vx_decode__DOT__mul_alu[8],4,0); // INTERNAL VARIABLES @@ -282,8 +258,8 @@ VL_MODULE(VVortex) { private: static QData _change_request(VVortex__Syms* __restrict vlSymsp); public: - static void _combo__TOP__4(VVortex__Syms* __restrict vlSymsp); - static void _combo__TOP__9(VVortex__Syms* __restrict vlSymsp); + static void _combo__TOP__5(VVortex__Syms* __restrict vlSymsp); + static void _combo__TOP__8(VVortex__Syms* __restrict vlSymsp); private: void _ctor_var_reset(); public: @@ -295,13 +271,12 @@ VL_MODULE(VVortex) { public: static void _eval_initial(VVortex__Syms* __restrict vlSymsp); static void _eval_settle(VVortex__Syms* __restrict vlSymsp); - static void _initial__TOP__6(VVortex__Syms* __restrict vlSymsp); - static void _sequent__TOP__2(VVortex__Syms* __restrict vlSymsp); + static void _initial__TOP__1(VVortex__Syms* __restrict vlSymsp); static void _sequent__TOP__3(VVortex__Syms* __restrict vlSymsp); - static void _sequent__TOP__5(VVortex__Syms* __restrict vlSymsp); + static void _sequent__TOP__4(VVortex__Syms* __restrict vlSymsp); + static void _sequent__TOP__6(VVortex__Syms* __restrict vlSymsp); static void _sequent__TOP__7(VVortex__Syms* __restrict vlSymsp); - static void _settle__TOP__1(VVortex__Syms* __restrict vlSymsp); - static void _settle__TOP__8(VVortex__Syms* __restrict vlSymsp); + static void _settle__TOP__2(VVortex__Syms* __restrict vlSymsp); } VL_ATTR_ALIGNED(128); #endif // guard diff --git a/rtl/obj_dir/VVortex.mk b/rtl/obj_dir/VVortex.mk index eedf8cab..edc5fcca 100644 --- a/rtl/obj_dir/VVortex.mk +++ b/rtl/obj_dir/VVortex.mk @@ -10,7 +10,7 @@ default: VVortex # Perl executable (from $PERL) PERL = perl # Path to Verilator kit (from $VERILATOR_ROOT) -VERILATOR_ROOT = /usr/local/share/verilator +VERILATOR_ROOT = /usr/local/Cellar/verilator/4.010/share/verilator # SystemC include directory with systemc.h (from $SYSTEMC_INCLUDE) SYSTEMC_INCLUDE ?= # SystemC library directory with libsystemc.a (from $SYSTEMC_LIBDIR) diff --git a/rtl/obj_dir/VVortex__ALL.a b/rtl/obj_dir/VVortex__ALL.a index 01a5b261..1210e548 100644 Binary files a/rtl/obj_dir/VVortex__ALL.a and b/rtl/obj_dir/VVortex__ALL.a differ diff --git a/rtl/obj_dir/VVortex__ALLcls.d b/rtl/obj_dir/VVortex__ALLcls.d index 94b032eb..1e080335 100644 --- a/rtl/obj_dir/VVortex__ALLcls.d +++ b/rtl/obj_dir/VVortex__ALLcls.d @@ -1,3 +1,4 @@ VVortex__ALLcls.o: VVortex__ALLcls.cpp VVortex.cpp VVortex.h \ - /usr/local/share/verilator/include/verilated.h \ - /usr/local/share/verilator/include/verilatedos.h VVortex__Syms.h + /usr/local/Cellar/verilator/4.010/share/verilator/include/verilated.h \ + /usr/local/Cellar/verilator/4.010/share/verilator/include/verilatedos.h \ + VVortex__Syms.h diff --git a/rtl/obj_dir/VVortex__ALLcls.o b/rtl/obj_dir/VVortex__ALLcls.o index 9bbc88e9..9d6eca9f 100644 Binary files a/rtl/obj_dir/VVortex__ALLcls.o and b/rtl/obj_dir/VVortex__ALLcls.o differ diff --git a/rtl/obj_dir/VVortex__ALLsup.d b/rtl/obj_dir/VVortex__ALLsup.d index 8cbbb061..41db4492 100644 --- a/rtl/obj_dir/VVortex__ALLsup.d +++ b/rtl/obj_dir/VVortex__ALLsup.d @@ -1,3 +1,4 @@ VVortex__ALLsup.o: VVortex__ALLsup.cpp VVortex__Syms.cpp VVortex__Syms.h \ - /usr/local/share/verilator/include/verilated.h \ - /usr/local/share/verilator/include/verilatedos.h VVortex.h + /usr/local/Cellar/verilator/4.010/share/verilator/include/verilated.h \ + /usr/local/Cellar/verilator/4.010/share/verilator/include/verilatedos.h \ + VVortex.h diff --git a/rtl/obj_dir/VVortex__ALLsup.o b/rtl/obj_dir/VVortex__ALLsup.o index 93a2deb0..87227610 100644 Binary files a/rtl/obj_dir/VVortex__ALLsup.o and b/rtl/obj_dir/VVortex__ALLsup.o differ diff --git a/rtl/obj_dir/VVortex__ver.d b/rtl/obj_dir/VVortex__ver.d index 8fab8f8c..265eb2b5 100644 --- a/rtl/obj_dir/VVortex__ver.d +++ b/rtl/obj_dir/VVortex__ver.d @@ -1 +1 @@ -obj_dir/VVortex.cpp obj_dir/VVortex.h obj_dir/VVortex.mk obj_dir/VVortex__Syms.cpp obj_dir/VVortex__Syms.h obj_dir/VVortex__ver.d obj_dir/VVortex_classes.mk : /usr/local/bin/verilator_bin /usr/local/bin/verilator_bin VX_alu.v VX_csr_handler.v VX_d_e_reg.v VX_decode.v VX_define.v VX_e_m_reg.v VX_execute.v VX_f_d_reg.v VX_fetch.v VX_forwarding.v VX_m_w_reg.v VX_memory.v VX_register_file.v VX_register_file_slave.v VX_shared_memory.v VX_writeback.v Vortex.v +obj_dir/VVortex.cpp obj_dir/VVortex.h obj_dir/VVortex.mk obj_dir/VVortex__Syms.cpp obj_dir/VVortex__Syms.h obj_dir/VVortex__ver.d obj_dir/VVortex_classes.mk : /usr/local/Cellar/verilator/4.010/bin/verilator_bin /usr/local/Cellar/verilator/4.010/bin/verilator_bin VX_alu.v VX_csr_handler.v VX_d_e_reg.v VX_decode.v VX_define.v VX_e_m_reg.v VX_execute.v VX_f_d_reg.v VX_fetch.v VX_forwarding.v VX_m_w_reg.v VX_memory.v VX_register_file.v VX_register_file_slave.v VX_warp.v VX_writeback.v Vortex.v diff --git a/rtl/obj_dir/VVortex__verFiles.dat b/rtl/obj_dir/VVortex__verFiles.dat index ec20be6d..dc5bc316 100644 --- a/rtl/obj_dir/VVortex__verFiles.dat +++ b/rtl/obj_dir/VVortex__verFiles.dat @@ -1,28 +1,28 @@ # DESCRIPTION: Verilator output: Timestamp data for --skip-identical. Delete at will. C "-Wall -cc Vortex.v --exe test_bench.cpp" -S 5163137 401094 1553636247 412576209 1553636247 412576209 "/usr/local/bin/verilator_bin" -S 2785 5518365 1554498824 810406070 1554498824 810406070 "VX_alu.v" -S 1495 5518326 1553635490 361093288 1553635490 361093288 "VX_csr_handler.v" -S 5105 5518327 1554498824 810406070 1554498824 810406070 "VX_d_e_reg.v" -S 15170 5518328 1554502090 670647015 1554502090 670647015 "VX_decode.v" -S 1557 5518330 1554504720 475408052 1554504720 475408052 "VX_define.v" -S 4077 5518331 1554498824 810406070 1554498824 810406070 "VX_e_m_reg.v" -S 3288 5518332 1554498824 810406070 1554498824 810406070 "VX_execute.v" -S 1558 5518333 1554498824 810406070 1554498824 810406070 "VX_f_d_reg.v" -S 4606 5518334 1554498824 810406070 1554498824 810406070 "VX_fetch.v" -S 5632 5518335 1553705050 153020819 1553705050 153020819 "VX_forwarding.v" -S 1677 5518336 1553705050 153020819 1553705050 153020819 "VX_m_w_reg.v" -S 3572 5518337 1554506617 876624096 1554506617 876624096 "VX_memory.v" -S 1078 5518338 1554498824 810406070 1554498824 810406070 "VX_register_file.v" -S 1387 5518394 1554498824 810406070 1554498824 810406070 "VX_register_file_slave.v" -S 645 5519352 1554505485 275081830 1554505485 275081830 "VX_shared_memory.v" -S 1454 5518339 1554501974 870074102 1554501974 870074102 "VX_writeback.v" -S 16949 5518364 1554505440 378865748 1554505440 378865748 "Vortex.v" -T 156200 5518343 1554506619 200630789 1554506619 200630789 "obj_dir/VVortex.cpp" -T 15426 5518342 1554506619 196630769 1554506619 196630769 "obj_dir/VVortex.h" -T 1777 5518345 1554506619 200630789 1554506619 200630789 "obj_dir/VVortex.mk" -T 530 5518341 1554506619 196630769 1554506619 196630769 "obj_dir/VVortex__Syms.cpp" -T 711 5518340 1554506619 196630769 1554506619 196630769 "obj_dir/VVortex__Syms.h" -T 462 5518346 1554506619 200630789 1554506619 200630789 "obj_dir/VVortex__ver.d" -T 0 0 1554506619 200630789 1554506619 200630789 "obj_dir/VVortex__verFiles.dat" -T 1159 5518344 1554506619 200630789 1554506619 200630789 "obj_dir/VVortex_classes.mk" +S 4608404 12889046060 1553037052 0 1548678579 0 "/usr/local/Cellar/verilator/4.010/bin/verilator_bin" +S 2785 12889457986 1554064009 0 1554064009 0 "VX_alu.v" +S 1495 12889457987 1554023089 0 1554023089 0 "VX_csr_handler.v" +S 5105 12889457988 1554023089 0 1554023089 0 "VX_d_e_reg.v" +S 15170 12890307904 1557104321 0 1557104321 0 "VX_decode.v" +S 1557 12890307906 1557104321 0 1557104321 0 "VX_define.v" +S 4077 12889457992 1554023089 0 1554023089 0 "VX_e_m_reg.v" +S 3288 12889457993 1554023938 0 1554023938 0 "VX_execute.v" +S 1558 12889457994 1554064040 0 1554064040 0 "VX_f_d_reg.v" +S 2237 12890309989 1557111275 0 1557111275 0 "VX_fetch.v" +S 5632 12889457996 1554023089 0 1554023089 0 "VX_forwarding.v" +S 1677 12889457997 1554023089 0 1554023089 0 "VX_m_w_reg.v" +S 3732 12890309990 1557110604 0 1557110604 0 "VX_memory.v" +S 1078 12889457999 1554023928 0 1554023928 0 "VX_register_file.v" +S 1387 12889458000 1554023933 0 1554023933 0 "VX_register_file_slave.v" +S 744 12890308905 1557110557 0 1557110557 0 "VX_warp.v" +S 1454 12890307909 1557104321 0 1557104321 0 "VX_writeback.v" +S 16949 12890307910 1557104321 0 1557104321 0 "Vortex.v" +T 145644 12890311152 1557111277 0 1557111277 0 "obj_dir/VVortex.cpp" +T 14410 12890311151 1557111277 0 1557111277 0 "obj_dir/VVortex.h" +T 1800 12890311154 1557111277 0 1557111277 0 "obj_dir/VVortex.mk" +T 530 12890311150 1557111277 0 1557111277 0 "obj_dir/VVortex__Syms.cpp" +T 711 12890311149 1557111277 0 1557111277 0 "obj_dir/VVortex__Syms.h" +T 499 12890311155 1557111277 0 1557111277 0 "obj_dir/VVortex__ver.d" +T 0 0 1557111277 0 1557111277 0 "obj_dir/VVortex__verFiles.dat" +T 1159 12890311153 1557111277 0 1557111277 0 "obj_dir/VVortex_classes.mk" diff --git a/rtl/obj_dir/test_bench.d b/rtl/obj_dir/test_bench.d index e70b646c..b918f78f 100644 --- a/rtl/obj_dir/test_bench.d +++ b/rtl/obj_dir/test_bench.d @@ -1,3 +1,4 @@ test_bench.o: ../test_bench.cpp ../test_bench.h ../VX_define.h ../ram.h \ - VVortex.h /usr/local/share/verilator/include/verilated.h \ - /usr/local/share/verilator/include/verilatedos.h + VVortex.h \ + /usr/local/Cellar/verilator/4.010/share/verilator/include/verilated.h \ + /usr/local/Cellar/verilator/4.010/share/verilator/include/verilatedos.h diff --git a/rtl/obj_dir/test_bench.o b/rtl/obj_dir/test_bench.o index 4a900e6a..cc3f85af 100644 Binary files a/rtl/obj_dir/test_bench.o and b/rtl/obj_dir/test_bench.o differ diff --git a/rtl/obj_dir/verilated.d b/rtl/obj_dir/verilated.d index 4f8241f8..8fb42837 100644 --- a/rtl/obj_dir/verilated.d +++ b/rtl/obj_dir/verilated.d @@ -1,8 +1,9 @@ -verilated.o: /usr/local/share/verilator/include/verilated.cpp \ - /usr/local/share/verilator/include/verilatedos.h \ - /usr/local/share/verilator/include/verilated_imp.h \ - /usr/local/share/verilator/include/verilated.h \ - /usr/local/share/verilator/include/verilated_heavy.h \ - /usr/local/share/verilator/include/verilated_syms.h \ - /usr/local/share/verilator/include/verilated_sym_props.h \ - /usr/local/share/verilator/include/verilated_config.h +verilated.o: \ + /usr/local/Cellar/verilator/4.010/share/verilator/include/verilated.cpp \ + /usr/local/Cellar/verilator/4.010/share/verilator/include/verilatedos.h \ + /usr/local/Cellar/verilator/4.010/share/verilator/include/verilated_imp.h \ + /usr/local/Cellar/verilator/4.010/share/verilator/include/verilated.h \ + /usr/local/Cellar/verilator/4.010/share/verilator/include/verilated_heavy.h \ + /usr/local/Cellar/verilator/4.010/share/verilator/include/verilated_syms.h \ + /usr/local/Cellar/verilator/4.010/share/verilator/include/verilated_sym_props.h \ + /usr/local/Cellar/verilator/4.010/share/verilator/include/verilated_config.h diff --git a/rtl/obj_dir/verilated.o b/rtl/obj_dir/verilated.o index 021e7b7b..e5cdef37 100644 Binary files a/rtl/obj_dir/verilated.o and b/rtl/obj_dir/verilated.o differ diff --git a/rtl/results.txt b/rtl/results.txt index 1bf4341c..e10a4dd0 100644 --- a/rtl/results.txt +++ b/rtl/results.txt @@ -3,5 +3,5 @@ # of forwarding stalls: 0 # of branch stalls: 0 # CPI: 1.00008 -# time to simulate: 2.13419e-317 milliseconds +# time to simulate: 6.95313e-310 milliseconds # GRADE: Failed on test: 0