L2 and L1 using different block size support, RTLsim fixes, dram_rsp_ready optimization

2020-11-21 09:47:56 -08:00
parent a7da36c007
commit 1795980a52
50 changed files with 972 additions and 952 deletions
--- a/hw/rtl/interfaces/VX_exu_to_cmt_if.v
+++ b/hw/rtl/interfaces/VX_exu_to_cmt_if.v
@@ -5,13 +5,15 @@

 interface VX_exu_to_cmt_if ();

-    wire                    valid;     
+    wire                    valid;
+
    wire [`NW_BITS-1:0]     wid;
    wire [`NUM_THREADS-1:0] tmask;    
    wire [31:0]             PC;
    wire [`NUM_THREADS-1:0][31:0] data;
    wire [`NR_BITS-1:0]     rd;
    wire                    wb;
+
    wire                    ready;  

 endinterface