scope fixes
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@@ -66,8 +66,8 @@ localparam MMIO_CSR_MEM_ADDR = `AFU_IMAGE_MMIO_CSR_MEM_ADDR;
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localparam MMIO_CSR_DATA_SIZE = `AFU_IMAGE_MMIO_CSR_DATA_SIZE;
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localparam MMIO_CSR_STATUS = `AFU_IMAGE_MMIO_CSR_STATUS;
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localparam MMIO_CSR_SCOPE_DELAY = `AFU_IMAGE_MMIO_CSR_SCOPE_DELAY;
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localparam MMIO_CSR_SCOPE_DATA = `AFU_IMAGE_MMIO_CSR_SCOPE_DATA;
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localparam MMIO_CSR_SCOPE_CMD = `AFU_IMAGE_MMIO_CSR_SCOPE_CMD;
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localparam MMIO_CSR_SCOPE_DATA= `AFU_IMAGE_MMIO_CSR_SCOPE_DATA;
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logic [127:0] afu_id = `AFU_ACCEL_UUID;
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@@ -138,7 +138,7 @@ t_ccip_clAddr csr_io_addr;
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logic[DRAM_ADDR_WIDTH-1:0] csr_mem_addr;
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logic[DRAM_ADDR_WIDTH-1:0] csr_data_size;
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logic [63:0] csr_scope_delay;
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logic [63:0] csr_scope_cmd;
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logic [63:0] csr_scope_data;
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logic csr_scope_read;
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logic csr_scope_write;
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@@ -153,8 +153,8 @@ assign mmio_hdr = t_ccip_c0_ReqMmioHdr'(cp2af_sRxPort.c0.hdr);
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t_if_ccip_c2_Tx mmio_tx;
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assign af2cp_sTxPort.c2 = mmio_tx;
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assign csr_scope_delay = 64'(cp2af_sRxPort.c0.data);
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assign csr_scope_write = cp2af_sRxPort.c0.mmioWrValid && (MMIO_CSR_SCOPE_DELAY == mmio_hdr.address);
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assign csr_scope_cmd = 64'(cp2af_sRxPort.c0.data);
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assign csr_scope_write = cp2af_sRxPort.c0.mmioWrValid && (MMIO_CSR_SCOPE_CMD == mmio_hdr.address);
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assign csr_scope_read = cp2af_sRxPort.c0.mmioRdValid && (MMIO_CSR_SCOPE_DATA == mmio_hdr.address);
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always_ff @(posedge clk)
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@@ -201,6 +201,11 @@ begin
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$display("%t: CSR_CMD: %0d", $time, $bits(csr_cmd)'(cp2af_sRxPort.c0.data));
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`endif
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end
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MMIO_CSR_SCOPE_CMD: begin
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`ifdef DBG_PRINT_OPAE
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$display("%t: CSR_SCOPE_CMD: %0d", $time, 64'(cp2af_sRxPort.c0.data));
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`endif
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end
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default: begin
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// user-defined CSRs
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//if (mmio_hdr.addres >= MMIO_CSR_USER) begin
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@@ -238,9 +243,9 @@ begin
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mmio_tx.data <= 64'(state);
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end
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MMIO_CSR_SCOPE_DATA: begin
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mmio_tx.data <= csr_scope_data;
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mmio_tx.data <= csr_scope_data;
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`ifdef DBG_PRINT_OPAE
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$display("%t: scope: data=%0d", $time, csr_scope_data);
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$display("%t: SCOPE: data=%0d", $time, csr_scope_data);
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`endif
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end
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default: mmio_tx.data <= 64'h0;
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@@ -790,18 +795,20 @@ end
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`ifdef SCOPE
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`SCOPE_SIGNALS_DECL()
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`SCOPE_SIGNALS_DECL
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`STATIC_ASSERT($bits({`SCOPE_SIGNALS_LIST}) == 85, "oops!")
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VX_scope #(
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.DATAW ($bits({`SCOPE_SIGNALS_LIST()})),
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.DATAW ($bits({`SCOPE_SIGNALS_LIST})),
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.BUSW (64),
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.SIZE (1024)
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.SIZE (256)
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) scope (
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.clk (clk),
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.reset (SoftReset),
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.start (vx_reset),
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.data_in ({`SCOPE_SIGNALS_LIST()}),
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.bus_in (csr_scope_delay),
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.data_in ({`SCOPE_SIGNALS_LIST}),
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.bus_in (csr_scope_cmd),
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.bus_out (csr_scope_data),
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.bus_read (csr_scope_read),
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.bus_write(csr_scope_write)
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@@ -814,7 +821,7 @@ VX_scope #(
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assign cmd_run_done = !vx_busy;
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Vortex_Socket #() vx_socket (
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`SCOPE_SIGNALS_ATTACH(),
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`SCOPE_SIGNALS_ATTACH
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.clk (clk),
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.reset (vx_reset),
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