register file refactoring

2020-12-05 01:40:50 -08:00
parent 478d971389
commit 13a5370254
33 changed files with 524 additions and 605 deletions
--- a/hw/rtl/VX_decode.v
+++ b/hw/rtl/VX_decode.v
@@ -347,11 +347,9 @@ module VX_decode  #(
        assign decode_if.rd  = rd;
        assign decode_if.rs1 = rs1_qual;
        assign decode_if.rs2 = rs2;
-        assign decode_if.rs3 = 0;
+        assign decode_if.rs3 = rs3;
    `endif

-    assign decode_if.use_rs3 = use_rs3;
-    
    assign decode_if.used_regs = ((`NUM_REGS)'(use_rd)  << decode_if.rd) 
                               | ((`NUM_REGS)'(use_rs1) << decode_if.rs1) 
                               | ((`NUM_REGS)'(use_rs2) << decode_if.rs2)