Modelsim basic sim

2019-10-26 00:34:57 -04:00
parent 9110e8367e
commit 1181af1df2
25 changed files with 72 additions and 501 deletions
--- a/rtl/cache/VX_Cache_Bank.v
+++ b/rtl/cache/VX_Cache_Bank.v
@@ -172,7 +172,8 @@ module VX_Cache_Bank
          .CACHE_SIZE(CACHE_SIZE),
          .CACHE_WAYS(CACHE_WAYS),
          .CACHE_BLOCK(CACHE_BLOCK),
-          .CACHE_BANKS(CACHE_BANKS)) data_structures(
+          .CACHE_BANKS(CACHE_BANKS),
+          .NUM_WORDS_PER_BLOCK(NUM_WORDS_PER_BLOCK)) data_structures(
        .clk       (clk),
        // Inputs
        .addr      (actual_index),