Modelsim basic sim

This commit is contained in:
felsabbagh3
2019-10-26 00:34:57 -04:00
parent 9110e8367e
commit 1181af1df2
25 changed files with 72 additions and 501 deletions

View File

@@ -1,4 +1,4 @@
`include "VX_define.v"
module VX_priority_encoder (
input wire[`NW-1:0] valids,