verilator suppor for opae (partial)
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@@ -1,4 +1,4 @@
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`include "VX_cache_config.vh"
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`include "VX_define.vh"
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module VX_dram_arb #(
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parameter BANK_LINE_SIZE = 1,
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@@ -1,5 +1,4 @@
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`include "VX_define.vh"
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`include "VX_cache_config.vh"
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module Vortex #(
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parameter CORE_ID = 0
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@@ -1,5 +1,4 @@
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`include "VX_define.vh"
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`include "VX_cache_config.vh"
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module Vortex_Cluster #(
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parameter CLUSTER_ID = 0
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@@ -1,5 +1,4 @@
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`include "VX_define.vh"
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`include "VX_cache_config.vh"
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module Vortex_Socket (
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// Clock
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@@ -132,7 +132,7 @@ module VX_generic_queue #(
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wr_ptr_r <= wr_ptr_r + 1;
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if (!reading) begin
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empty_r <= 0;
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if (size_r == SIZE-1) begin
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if (size_r == $bits(size_r)'(SIZE-1)) begin
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full_r <= 1;
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end
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size_r <= size_r + 1;
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