verilator suppor for opae (partial)
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@@ -19,6 +19,7 @@ DBG_PRINT_FLAGS = -DDBG_PRINT_CORE_ICACHE \
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MULTICORE += -DNUM_CLUSTERS=1 -DNUM_CORES=2
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#DEBUG = 1
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AFU=1
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CFLAGS += -fPIC
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@@ -27,6 +28,8 @@ CFLAGS += -DUSE_RTLSIM $(MULTICORE)
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LDFLAGS += -shared -pthread
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# LDFLAGS += -dynamiclib -pthread
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TOP = Vortex_Socket
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SRCS = vortex.cpp ../common/vx_utils.cpp ../../hw/simulate/simulator.cpp
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RTL_INCLUDE = -I../../hw/rtl -I../../hw/rtl/libs -I../../hw/rtl/interfaces -I../../hw/rtl/pipe_regs -I../../hw/rtl/cache
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@@ -48,14 +51,22 @@ else
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VL_FLAGS += -DNDEBUG
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endif
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# AFU
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ifdef AFU
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TOP = vortex_afu_sim
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VL_FLAGS += -DNOPAE
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CFLAGS += -DNOPAE
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RTL_INCLUDE += -I../../hw/opae -I../../hw/opae/ccip
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endif
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PROJECT = libvortex.so
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# PROJECT = libvortex.dylib
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all: $(PROJECT)
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$(PROJECT): $(SRCS)
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verilator --exe --cc Vortex_Socket.v $(RTL_INCLUDE) $(VL_FLAGS) $(SRCS) -CFLAGS '$(CFLAGS)' -LDFLAGS '$(LDFLAGS)' -o ../$(PROJECT)
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make -j -C obj_dir -f VVortex_Socket.mk
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verilator --exe --cc $(TOP) $(RTL_INCLUDE) $(VL_FLAGS) $(SRCS) -CFLAGS '$(CFLAGS)' -LDFLAGS '$(LDFLAGS)' -o ../$(PROJECT)
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make -j -C obj_dir -f V$(TOP).mk
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clean:
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rm -rf $(PROJECT) obj_dir
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