refactoring all arbiters with buffering for request count > 2, optimized the cache core response module in critical path when running as L2
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@@ -19,7 +19,7 @@ ase-2c: gen_sources setup-ase-2c
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ase-4c: gen_sources setup-ase-4c
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make -C $(ASE_BUILD_DIR)_4c
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cp ../rtl/fp_cores/altera/*.hex $(ASE_BUILD_DIR)_3c/work
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cp ../rtl/fp_cores/altera/*.hex $(ASE_BUILD_DIR)_4c/work
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setup-ase-1c: $(ASE_BUILD_DIR)_1c/Makefile
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@@ -1,5 +1,5 @@
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+define+NUM_CORES=4
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+define+L2_ENABLE=0
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+define+L2_ENABLE=1
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+define+SYNTHESIS
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+define+QUARTUS
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+define+FPU_FAST
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