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ibuffer addition

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This commit is contained in:
Blaise Tine
2020-08-22 00:22:04 -07:00
parent 6c12391338
commit 0b355f228e
80 changed files with 1811 additions and 1528 deletions
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64
hw/rtl/libs/VX_elastic_buffer.v
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@@ -14,53 +14,25 @@ module VX_elastic_buffer #(
input wire ready_out,
output wire valid_out
);
if (0 == SIZE) begin
wire empty, full;
reg [DATAW-1:0] skid_buffer;
reg skid_valid;
VX_generic_queue #(
.DATAW (DATAW),
.SIZE (SIZE),
.BUFFERED (BUFFERED)
) queue (
.clk (clk),
.reset (reset),
.push (valid_in),
.pop (ready_out),
.data_in(data_in),
.data_out(data_out),
.empty (empty),
.full (full),
`UNUSED_PIN (size)
);
always @(posedge clk) begin
if (reset) begin
skid_valid <= 0;
end else begin
if (valid_in && ~ready_out) begin
assert(~skid_valid);
skid_buffer <= data_in;
skid_valid <= 1;
end
if (ready_out) begin
skid_valid <= 0;
end
end
end
assign ready_in = ready_out || ~skid_valid;
assign data_out = skid_valid ? skid_buffer : data_in;
assign valid_out = valid_in || skid_valid;
end else begin
wire empty, full;
VX_generic_queue #(
.DATAW (DATAW),
.SIZE (SIZE),
.BUFFERED (BUFFERED)
) queue (
.clk (clk),
.reset (reset),
.push (valid_in),
.pop (ready_out),
.data_in(data_in),
.data_out(data_out),
.empty (empty),
.full (full),
`UNUSED_PIN (size)
);
assign ready_in = ~full;
assign valid_out = ~empty;
end
assign ready_in = ~full;
assign valid_out = ~empty;
endmodule