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ibuffer addition

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This commit is contained in:
Blaise Tine
2020-08-22 00:22:04 -07:00
parent 6c12391338
commit 0b355f228e
80 changed files with 1811 additions and 1528 deletions
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29
hw/rtl/libs/VX_cam_buffer.v
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@@ -1,19 +1,21 @@
`include "VX_platform.vh"
module VX_cam_buffer #(
parameter DATAW = 1,
parameter SIZE = 1,
parameter RPORTS = 1,
parameter DATAW = 1,
parameter SIZE = 1,
parameter RPORTS = 1,
parameter CPORTS = 1,
parameter ADDRW = `LOG2UP(SIZE)
) (
input wire clk,
input wire reset,
input wire [DATAW-1:0] write_data,
output wire [ADDRW-1:0] write_addr,
input wire [DATAW-1:0] write_data,
input wire acquire_slot,
input wire [RPORTS-1:0][ADDRW-1:0] read_addr,
output reg [RPORTS-1:0][DATAW-1:0] read_data,
input wire [RPORTS-1:0] release_slot,
input wire [CPORTS-1:0][ADDRW-1:0] release_addr,
input wire [CPORTS-1:0] release_slot,
output wire full
);
reg [DATAW-1:0] entries [SIZE-1:0];
@@ -34,12 +36,11 @@ module VX_cam_buffer #(
always @(*) begin
free_slots_n = free_slots;
for (integer i = 0; i < RPORTS; i++) begin
for (integer i = 0; i < CPORTS; i++) begin
if (release_slot[i]) begin
free_slots_n[read_addr[i]] = 1;
end
read_data[i] = entries[read_addr[i]];
end
free_slots_n[release_addr[i]] = 1;
end
end
if (acquire_slot) begin
free_slots_n[write_addr_r] = 0;
end
@@ -55,15 +56,19 @@ module VX_cam_buffer #(
assert(1 == free_slots[write_addr]) else $display("%t: inused slot at port %d", $time, write_addr);
entries[write_addr] <= write_data;
end
for (integer i = 0; i < RPORTS; i++) begin
for (integer i = 0; i < CPORTS; i++) begin
if (release_slot[i]) begin
assert(0 == free_slots[read_addr[i]]) else $display("%t: freed slot at port %d", $time, read_addr[i]);
assert(0 == free_slots[release_addr[i]]) else $display("%t: freed slot at port %d", $time, release_addr[i]);
end
end
free_slots <= free_slots_n;
write_addr_r <= free_index;
full_r <= ~free_valid;
end
end
for (genvar i = 0; i < RPORTS; i++) begin
assign read_data[i] = entries[read_addr[i]];
end
assign write_addr = write_addr_r;