Implement WU architecture support

hw/rtl/VX_gpu_pkg.sv

@@ -46,6 +46,8 @@ package VX_gpu_pkg;
         logic                   valid;
         logic [`NB_WIDTH-1:0]   id;
         logic                   is_global;
+        logic [1:0]             domain;
+        logic [`NUM_WARPS-1:0]  mask;
     `ifdef GBAR_ENABLE
         logic [`MAX(`NW_WIDTH, `NC_WIDTH)-1:0] size_m1;
     `else
@@ -53,6 +55,13 @@ package VX_gpu_pkg;
     `endif
     } barrier_t;
 
+    localparam logic [1:0] BARRIER_ALL    = 2'd0;
+    localparam logic [1:0] BARRIER_SCALAR = 2'd1;
+    localparam logic [1:0] BARRIER_TENSOR = 2'd2;
+    localparam logic [1:0] BARRIER_MASK   = 2'd3;
+    localparam logic       WU_DOMAIN_SCALAR = 1'b0;
+    localparam logic       WU_DOMAIN_TENSOR = 1'b1;
+
     typedef struct packed {
         logic [`XLEN-1:0]   startup_addr;
         logic [7:0]         mpm_class;
@@ -90,7 +99,7 @@ package VX_gpu_pkg;
     localparam ICACHE_TAG_ID_BITS	= `NW_WIDTH;
 
     // Core request tag bits
-    localparam ICACHE_TAG_WIDTH	    = (`UUID_WIDTH + ICACHE_TAG_ID_BITS);
+    localparam ICACHE_TAG_WIDTH	    = (1 + `UUID_WIDTH + ICACHE_TAG_ID_BITS);
 
     // Memory request data bits
     localparam ICACHE_MEM_DATA_WIDTH = (ICACHE_LINE_SIZE * 8);