From 08986bf1dce632dd76adccd878e2182deb3b37e2 Mon Sep 17 00:00:00 2001 From: felsabbagh3 Date: Tue, 3 Mar 2020 20:57:20 -0800 Subject: [PATCH] Fixed incorrect valid and'ing in execute --- rtl/VX_execute_unit.v | 2 +- rtl/VX_scheduler.v | 6 +++--- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/rtl/VX_execute_unit.v b/rtl/VX_execute_unit.v index 697c20cb..f262e0b4 100644 --- a/rtl/VX_execute_unit.v +++ b/rtl/VX_execute_unit.v @@ -115,7 +115,7 @@ module VX_execute_unit ( // Actual Writeback assign VX_inst_exec_wb.rd = VX_exec_unit_req.rd; assign VX_inst_exec_wb.wb = VX_exec_unit_req.wb; - assign VX_inst_exec_wb.wb_valid = VX_exec_unit_req.valid && !internal_stall; + assign VX_inst_exec_wb.wb_valid = VX_exec_unit_req.valid & {`NT{!internal_stall}}; assign VX_inst_exec_wb.wb_warp_num = VX_exec_unit_req.warp_num; assign VX_inst_exec_wb.alu_result = VX_exec_unit_req.jal ? duplicate_PC_data : alu_result; diff --git a/rtl/VX_scheduler.v b/rtl/VX_scheduler.v index a3116744..e7308f9c 100644 --- a/rtl/VX_scheduler.v +++ b/rtl/VX_scheduler.v @@ -50,9 +50,9 @@ module VX_scheduler ( wire rename_valid = rs1_rename_qual || rs2_rename_qual || rd_rename_qual; assign schedule_delay = ((rename_valid) && (|VX_bckE_req.valid)) - || (memory_delay && is_mem) - || (gpr_stage_delay && (is_mem || is_exec)) - || (exec_delay && is_exec); + || (memory_delay && is_mem) + || (gpr_stage_delay && (is_mem || is_exec)) + || (exec_delay && is_exec); integer i; integer w;