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minor update

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This commit is contained in:
Blaise Tine
2021-07-20 21:42:22 -07:00
parent 8048796102
commit 0319283ea7
10 changed files with 51 additions and 50 deletions
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10
hw/rtl/VX_mem_unit.v
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@@ -30,24 +30,24 @@ module VX_mem_unit # (
`endif
VX_mem_req_if #(
.LINE_WIDTH (`IMEM_LINE_WIDTH),
.DATA_WIDTH (`IMEM_DATA_WIDTH),
.ADDR_WIDTH (`IMEM_ADDR_WIDTH),
.TAG_WIDTH (`IMEM_TAG_WIDTH)
) icache_mem_req_if();
VX_mem_rsp_if #(
.LINE_WIDTH (`IMEM_LINE_WIDTH),
.DATA_WIDTH (`IMEM_DATA_WIDTH),
.TAG_WIDTH (`IMEM_TAG_WIDTH)
) icache_mem_rsp_if();
VX_mem_req_if #(
.LINE_WIDTH (`DMEM_LINE_WIDTH),
.DATA_WIDTH (`DMEM_DATA_WIDTH),
.ADDR_WIDTH (`DMEM_ADDR_WIDTH),
.TAG_WIDTH (`DMEM_TAG_WIDTH)
) dcache_mem_req_if();
VX_mem_rsp_if #(
.LINE_WIDTH (`DMEM_LINE_WIDTH),
.DATA_WIDTH (`DMEM_DATA_WIDTH),
.TAG_WIDTH (`DMEM_TAG_WIDTH)
) dcache_mem_rsp_if();
@@ -271,7 +271,7 @@ module VX_mem_unit # (
VX_mem_arb #(
.NUM_REQS (2),
.DATA_WIDTH (`DMEM_LINE_WIDTH),
.DATA_WIDTH (`DMEM_DATA_WIDTH),
.ADDR_WIDTH (`DMEM_ADDR_WIDTH),
.TAG_IN_WIDTH (`DMEM_TAG_WIDTH),
.BUFFERED_REQ (1),