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This commit is contained in:
Hansung Kim
2023-10-15 01:17:20 -07:00
parent dd194ca61d
commit ff4fc66c56
2 changed files with 142 additions and 81 deletions
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2
src/main/scala/rocket/VortexCore.scala
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@@ -8,8 +8,6 @@ import chisel3.util._
import chisel3.experimental._
import org.chipsalliance.cde.config.Parameters
import freechips.rocketchip.tile._
import freechips.rocketchip.util._
import freechips.rocketchip.scie._
import tile.VortexTile
class VortexBundle(tile: VortexTile)(implicit p: Parameters) extends CoreBundle {