Add tensorCoreDecoupled param to WithRadianceCores
This commit is contained in:
@@ -48,6 +48,7 @@ class WithRadianceCores(
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location: HierarchicalLocation,
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location: HierarchicalLocation,
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crossing: RocketCrossingParams,
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crossing: RocketCrossingParams,
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tensorCoreFP16: Boolean,
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tensorCoreFP16: Boolean,
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tensorCoreDecoupled: Boolean,
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useVxCache: Boolean
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useVxCache: Boolean
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) extends Config((site, _, up) => {
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) extends Config((site, _, up) => {
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case TilesLocated(`location`) => {
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case TilesLocated(`location`) => {
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@@ -55,7 +56,10 @@ class WithRadianceCores(
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val idOffset = up(NumTiles)
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val idOffset = up(NumTiles)
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val coreIdOffset = up(NumRadianceCores)
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val coreIdOffset = up(NumRadianceCores)
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val vortex = RadianceTileParams(
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val vortex = RadianceTileParams(
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core = VortexCoreParams(tensorCoreFP16 = tensorCoreFP16),
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core = VortexCoreParams(
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tensorCoreFP16 = tensorCoreFP16,
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tensorCoreDecoupled = tensorCoreDecoupled
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),
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btb = None,
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btb = None,
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useVxCache = useVxCache,
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useVxCache = useVxCache,
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dcache = Some(DCacheParams(
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dcache = Some(DCacheParams(
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@@ -90,7 +94,8 @@ class WithRadianceCores(
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}) {
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}) {
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// constructor override that omits `crossing`
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// constructor override that omits `crossing`
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def this(n: Int, location: HierarchicalLocation = InSubsystem,
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def this(n: Int, location: HierarchicalLocation = InSubsystem,
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tensorCoreFP16: Boolean = false, useVxCache: Boolean = false)
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tensorCoreFP16: Boolean = false, tensorCoreDecoupled: Boolean = false,
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useVxCache: Boolean = false)
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= this(n, location, RocketCrossingParams(
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= this(n, location, RocketCrossingParams(
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master = HierarchicalElementMasterPortParams.locationDefault(location),
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master = HierarchicalElementMasterPortParams.locationDefault(location),
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slave = HierarchicalElementSlavePortParams.locationDefault(location),
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slave = HierarchicalElementSlavePortParams.locationDefault(location),
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@@ -98,7 +103,7 @@ class WithRadianceCores(
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case InSubsystem => CBUS
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case InSubsystem => CBUS
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case InCluster(clusterId) => CCBUS(clusterId)
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case InCluster(clusterId) => CCBUS(clusterId)
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}
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}
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), tensorCoreFP16, useVxCache)
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), tensorCoreFP16, tensorCoreDecoupled, useVxCache)
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}
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}
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object RadianceGemminiDataType extends Enumeration {
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object RadianceGemminiDataType extends Enumeration {
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@@ -99,6 +99,7 @@ case class VortexCoreParams(
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mulDiv: Option[MulDivParams] = None,
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mulDiv: Option[MulDivParams] = None,
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fpu: Option[FPUParams] = None,
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fpu: Option[FPUParams] = None,
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tensorCoreFP16: Boolean = false, // FP16 if true, FP32 if false
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tensorCoreFP16: Boolean = false, // FP16 if true, FP32 if false
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tensorCoreDecoupled: Boolean = false, // hopper-style SMEM operand decoupling
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debugROB: Boolean = false, // if enabled, uses a C++ debug ROB to generate trace-with-wdata
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debugROB: Boolean = false, // if enabled, uses a C++ debug ROB to generate trace-with-wdata
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haveCease: Boolean = true, // non-standard CEASE instruction
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haveCease: Boolean = true, // non-standard CEASE instruction
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haveSimTimeout: Boolean = true // add plusarg for simulation timeout
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haveSimTimeout: Boolean = true // add plusarg for simulation timeout
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@@ -405,37 +405,42 @@ class Vortex(tile: RadianceTile)(implicit p: Parameters)
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// tensor core
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// tensor core
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addResource("/vsrc/vortex/hw/rtl/core/VX_tensor_core.sv")
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addResource("/vsrc/vortex/hw/rtl/core/VX_tensor_core.sv")
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addResource("/vsrc/vortex/hw/rtl/core/VX_tensor_hopper_core.sv")
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addResource("/vsrc/vortex/hw/rtl/mem/VX_tc_bus_if.sv")
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addResource("/vsrc/vortex/hw/rtl/mem/VX_tc_bus_if.sv")
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// addResource("/vsrc/vortex/hw/rtl/core/VX_tensor_ucode.vh")
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def addHopperTensorCore = {
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// hopper-style SMEM operand decoupling
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addPath("/scratch/hansung/chipyard/sims/vcs/generated-src/chipyard.unittest.TestHarness.TensorUnitTestConfig/gen-collateral/AddRawFN.sv")
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if (tile.radianceParams.core.tensorCoreDecoupled) {
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addPath("/scratch/hansung/chipyard/sims/vcs/generated-src/chipyard.unittest.TestHarness.TensorUnitTestConfig/gen-collateral/AddRecFN.sv")
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addResource("/vsrc/vortex/hw/rtl/core/VX_tensor_hopper_core.sv")
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addPath("/scratch/hansung/chipyard/sims/vcs/generated-src/chipyard.unittest.TestHarness.TensorUnitTestConfig/gen-collateral/DotProductPipe.sv")
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// addResource("/vsrc/vortex/hw/rtl/core/VX_tensor_ucode.vh")
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addPath("/scratch/hansung/chipyard/sims/vcs/generated-src/chipyard.unittest.TestHarness.TensorUnitTestConfig/gen-collateral/FillBuffer_1.sv")
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def addHopperTensorCore = {
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addPath("/scratch/hansung/chipyard/sims/vcs/generated-src/chipyard.unittest.TestHarness.TensorUnitTestConfig/gen-collateral/FillBuffer.sv")
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addPath("/scratch/hansung/chipyard/sims/vcs/generated-src/chipyard.unittest.TestHarness.TensorUnitTestConfig/gen-collateral/AddRawFN.sv")
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addPath("/scratch/hansung/chipyard/sims/vcs/generated-src/chipyard.unittest.TestHarness.TensorUnitTestConfig/gen-collateral/metadataTable_4x5.sv")
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addPath("/scratch/hansung/chipyard/sims/vcs/generated-src/chipyard.unittest.TestHarness.TensorUnitTestConfig/gen-collateral/AddRecFN.sv")
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addPath("/scratch/hansung/chipyard/sims/vcs/generated-src/chipyard.unittest.TestHarness.TensorUnitTestConfig/gen-collateral/MulFullRawFN.sv")
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addPath("/scratch/hansung/chipyard/sims/vcs/generated-src/chipyard.unittest.TestHarness.TensorUnitTestConfig/gen-collateral/DotProductPipe.sv")
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addPath("/scratch/hansung/chipyard/sims/vcs/generated-src/chipyard.unittest.TestHarness.TensorUnitTestConfig/gen-collateral/occupancyTable_4x1.sv")
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addPath("/scratch/hansung/chipyard/sims/vcs/generated-src/chipyard.unittest.TestHarness.TensorUnitTestConfig/gen-collateral/FillBuffer_1.sv")
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addPath("/scratch/hansung/chipyard/sims/vcs/generated-src/chipyard.unittest.TestHarness.TensorUnitTestConfig/gen-collateral/Queue1_TensorCoreDecoupled_Anon_1.sv")
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addPath("/scratch/hansung/chipyard/sims/vcs/generated-src/chipyard.unittest.TestHarness.TensorUnitTestConfig/gen-collateral/FillBuffer.sv")
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addPath("/scratch/hansung/chipyard/sims/vcs/generated-src/chipyard.unittest.TestHarness.TensorUnitTestConfig/gen-collateral/Queue1_TensorCoreDecoupled_Anon.sv")
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addPath("/scratch/hansung/chipyard/sims/vcs/generated-src/chipyard.unittest.TestHarness.TensorUnitTestConfig/gen-collateral/metadataTable_4x5.sv")
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addPath("/scratch/hansung/chipyard/sims/vcs/generated-src/chipyard.unittest.TestHarness.TensorUnitTestConfig/gen-collateral/Queue1_TensorMemTag.sv")
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addPath("/scratch/hansung/chipyard/sims/vcs/generated-src/chipyard.unittest.TestHarness.TensorUnitTestConfig/gen-collateral/MulFullRawFN.sv")
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addPath("/scratch/hansung/chipyard/sims/vcs/generated-src/chipyard.unittest.TestHarness.TensorUnitTestConfig/gen-collateral/Queue4_TensorMemRespWithTag.sv")
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addPath("/scratch/hansung/chipyard/sims/vcs/generated-src/chipyard.unittest.TestHarness.TensorUnitTestConfig/gen-collateral/occupancyTable_4x1.sv")
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addPath("/scratch/hansung/chipyard/sims/vcs/generated-src/chipyard.unittest.TestHarness.TensorUnitTestConfig/gen-collateral/Queue5_TensorComputeTag.sv")
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addPath("/scratch/hansung/chipyard/sims/vcs/generated-src/chipyard.unittest.TestHarness.TensorUnitTestConfig/gen-collateral/Queue1_TensorCoreDecoupled_Anon_1.sv")
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addPath("/scratch/hansung/chipyard/sims/vcs/generated-src/chipyard.unittest.TestHarness.TensorUnitTestConfig/gen-collateral/ram_4x261.sv")
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addPath("/scratch/hansung/chipyard/sims/vcs/generated-src/chipyard.unittest.TestHarness.TensorUnitTestConfig/gen-collateral/Queue1_TensorCoreDecoupled_Anon.sv")
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addPath("/scratch/hansung/chipyard/sims/vcs/generated-src/chipyard.unittest.TestHarness.TensorUnitTestConfig/gen-collateral/ram_5x7.sv")
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addPath("/scratch/hansung/chipyard/sims/vcs/generated-src/chipyard.unittest.TestHarness.TensorUnitTestConfig/gen-collateral/Queue1_TensorMemTag.sv")
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addPath("/scratch/hansung/chipyard/sims/vcs/generated-src/chipyard.unittest.TestHarness.TensorUnitTestConfig/gen-collateral/RoundAnyRawFNToRecFN_ie8_is26_oe8_os24.sv")
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addPath("/scratch/hansung/chipyard/sims/vcs/generated-src/chipyard.unittest.TestHarness.TensorUnitTestConfig/gen-collateral/Queue4_TensorMemRespWithTag.sv")
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addPath("/scratch/hansung/chipyard/sims/vcs/generated-src/chipyard.unittest.TestHarness.TensorUnitTestConfig/gen-collateral/RoundAnyRawFNToRecFN_ie8_is47_oe8_os24.sv")
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addPath("/scratch/hansung/chipyard/sims/vcs/generated-src/chipyard.unittest.TestHarness.TensorUnitTestConfig/gen-collateral/Queue5_TensorComputeTag.sv")
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addPath("/scratch/hansung/chipyard/sims/vcs/generated-src/chipyard.unittest.TestHarness.TensorUnitTestConfig/gen-collateral/RoundRawFNToRecFN_e8_s24.sv")
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addPath("/scratch/hansung/chipyard/sims/vcs/generated-src/chipyard.unittest.TestHarness.TensorUnitTestConfig/gen-collateral/ram_4x261.sv")
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addPath("/scratch/hansung/chipyard/sims/vcs/generated-src/chipyard.unittest.TestHarness.TensorUnitTestConfig/gen-collateral/SimpleTimer.sv")
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addPath("/scratch/hansung/chipyard/sims/vcs/generated-src/chipyard.unittest.TestHarness.TensorUnitTestConfig/gen-collateral/ram_5x7.sv")
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addPath("/scratch/hansung/chipyard/sims/vcs/generated-src/chipyard.unittest.TestHarness.TensorUnitTestConfig/gen-collateral/SourceGenerator.sv")
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addPath("/scratch/hansung/chipyard/sims/vcs/generated-src/chipyard.unittest.TestHarness.TensorUnitTestConfig/gen-collateral/RoundAnyRawFNToRecFN_ie8_is26_oe8_os24.sv")
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addPath("/scratch/hansung/chipyard/sims/vcs/generated-src/chipyard.unittest.TestHarness.TensorUnitTestConfig/gen-collateral/StallingPipe_1.sv")
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addPath("/scratch/hansung/chipyard/sims/vcs/generated-src/chipyard.unittest.TestHarness.TensorUnitTestConfig/gen-collateral/RoundAnyRawFNToRecFN_ie8_is47_oe8_os24.sv")
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addPath("/scratch/hansung/chipyard/sims/vcs/generated-src/chipyard.unittest.TestHarness.TensorUnitTestConfig/gen-collateral/StallingPipe_2.sv")
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addPath("/scratch/hansung/chipyard/sims/vcs/generated-src/chipyard.unittest.TestHarness.TensorUnitTestConfig/gen-collateral/RoundRawFNToRecFN_e8_s24.sv")
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addPath("/scratch/hansung/chipyard/sims/vcs/generated-src/chipyard.unittest.TestHarness.TensorUnitTestConfig/gen-collateral/StallingPipe.sv")
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addPath("/scratch/hansung/chipyard/sims/vcs/generated-src/chipyard.unittest.TestHarness.TensorUnitTestConfig/gen-collateral/SimpleTimer.sv")
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addPath("/scratch/hansung/chipyard/sims/vcs/generated-src/chipyard.unittest.TestHarness.TensorUnitTestConfig/gen-collateral/TensorCoreDecoupled.sv")
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addPath("/scratch/hansung/chipyard/sims/vcs/generated-src/chipyard.unittest.TestHarness.TensorUnitTestConfig/gen-collateral/SourceGenerator.sv")
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addPath("/scratch/hansung/chipyard/sims/vcs/generated-src/chipyard.unittest.TestHarness.TensorUnitTestConfig/gen-collateral/TensorDotProductUnit.sv")
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addPath("/scratch/hansung/chipyard/sims/vcs/generated-src/chipyard.unittest.TestHarness.TensorUnitTestConfig/gen-collateral/StallingPipe_1.sv")
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addPath("/scratch/hansung/chipyard/sims/vcs/generated-src/chipyard.unittest.TestHarness.TensorUnitTestConfig/gen-collateral/StallingPipe_2.sv")
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addPath("/scratch/hansung/chipyard/sims/vcs/generated-src/chipyard.unittest.TestHarness.TensorUnitTestConfig/gen-collateral/StallingPipe.sv")
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addPath("/scratch/hansung/chipyard/sims/vcs/generated-src/chipyard.unittest.TestHarness.TensorUnitTestConfig/gen-collateral/TensorCoreDecoupled.sv")
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addPath("/scratch/hansung/chipyard/sims/vcs/generated-src/chipyard.unittest.TestHarness.TensorUnitTestConfig/gen-collateral/TensorDotProductUnit.sv")
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}
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// addHopperTensorCore
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}
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}
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// addHopperTensorCore
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addResource("/vsrc/vortex/hw/rtl/core/VX_uop_sequencer.sv")
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addResource("/vsrc/vortex/hw/rtl/core/VX_uop_sequencer.sv")
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addResource("/vsrc/vortex/hw/rtl/core/VX_reduce_unit.sv")
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addResource("/vsrc/vortex/hw/rtl/core/VX_reduce_unit.sv")
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addResource("/vsrc/vortex/hw/rtl/fpu/VX_tensor_dpu.sv")
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addResource("/vsrc/vortex/hw/rtl/fpu/VX_tensor_dpu.sv")
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