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Change parameters to spatial-only coalescing

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Hansung Kim
2023-04-20 21:09:19 -07:00
parent 322f340657
commit b2ab45f5e2
1 changed files with 5 additions and 5 deletions
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10
src/main/scala/tilelink/Coalescing.scala
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@@ -55,7 +55,7 @@ class CoalescingUnitImp(outer: CoalescingUnit, numLanes: Int) extends LazyModule
val wordSize = 4 val wordSize = 4
val reqQueueDepth = 4 // FIXME test val reqQueueDepth = 1
val respQueueDepth = 4 // FIXME test val respQueueDepth = 4 // FIXME test
val sourceWidth = outer.node.in(1)._1.params.sourceBits val sourceWidth = outer.node.in(1)._1.params.sourceBits
@@ -66,8 +66,8 @@ class CoalescingUnitImp(outer: CoalescingUnit, numLanes: Int) extends LazyModule
} }
// The maximum number of requests from a single lane that can go into a // The maximum number of requests from a single lane that can go into a
// coalesced request. Upper bound is 2**sourceWidth. // coalesced request. Upper bound is request queue depth.
val numPerLaneReqs = 2 val numPerLaneReqs = 1
val respQueueEntryT = new RespQueueEntry(sourceWidth, wordSize * 8) val respQueueEntryT = new RespQueueEntry(sourceWidth, wordSize * 8)
val respQueues = Seq.tabulate(numLanes) { _ => val respQueues = Seq.tabulate(numLanes) { _ =>
@@ -280,8 +280,6 @@ class CoalescingUnitImp(outer: CoalescingUnit, numLanes: Int) extends LazyModule
uncoalescer.io.coalRespSrcId := tlCoal.d.bits.source uncoalescer.io.coalRespSrcId := tlCoal.d.bits.source
uncoalescer.io.coalRespData := tlCoal.d.bits.data uncoalescer.io.coalRespData := tlCoal.d.bits.data
// TODO: multibeat TL requests. Currently tlCoal.d.bits.data is fixed to 64b
// width
println(s"=========== coalRespData width: ${tlCoal.d.bits.data.widthOption.get}") println(s"=========== coalRespData width: ${tlCoal.d.bits.data.widthOption.get}")
// Queue up synthesized uncoalesced responses into each lane's response queue // Queue up synthesized uncoalesced responses into each lane's response queue
@@ -511,6 +509,8 @@ class CoalShiftQueue[T <: Data](
val invalidate = Input(UInt(entries.W)) val invalidate = Input(UInt(entries.W))
val mask = Output(UInt(entries.W)) val mask = Output(UInt(entries.W))
val elts = Output(Vec(entries, gen)) val elts = Output(Vec(entries, gen))
// 'QueueIO' provides io.count, but we might not want to use it in the
// coalescer because it has potentially expensive PopCount
}) })
private val valid = RegInit(VecInit(Seq.fill(entries) { false.B })) private val valid = RegInit(VecInit(Seq.fill(entries) { false.B }))