running coalescing flow
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@@ -34,19 +34,16 @@ class MultiPortQueueUnitTest extends AnyFlatSpec with ChiselScalatestTester {
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}
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class DummyCoalescingUnitTB(implicit p: Parameters) extends LazyModule {
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val cpuNodes = Seq.tabulate(testConfig.NUM_LANES) { _ =>
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val cpuNodes = Seq.tabulate(testConfig.numLanes) { _ =>
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TLClientNode(Seq(TLMasterPortParameters.v1(Seq(TLClientParameters(
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name = "processor-nodes",
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sourceId = IdRange(0, testConfig.NUM_OLD_IDS),
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sourceId = IdRange(0, testConfig.numOldSrcIds),
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requestFifo = true,
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visibility = Seq(AddressSet(0x0, 0xffffff))))))) // 24 bit address space (TODO probably use testConfig)
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}
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// FIXME: this mitm is part of a desperate effort, can remove now & reconnect
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val mitm = Seq.tabulate(testConfig.NUM_LANES) {_ => TLIdentityNode()}
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val device = new SimpleDevice("dummy", Seq("dummy"))
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val beatBytes = 1 << testConfig.DATA_BUS_SIZE // 256 bit bus
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val beatBytes = 1 << testConfig.dataBusWidth // 256 bit bus
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val l2Nodes = Seq.tabulate(5) { _ =>
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TLManagerNode(Seq(TLSlavePortParameters.v1(Seq(TLManagerParameters(
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address = Seq(AddressSet(0x0, 0xffffff)), // should be matching cpuNode
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@@ -68,7 +65,6 @@ class DummyCoalescingUnitTB(implicit p: Parameters) extends LazyModule {
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}
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class DummyCoalescingUnitTBImp(outer: DummyCoalescingUnitTB) extends LazyModuleImp(outer) {
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val mitmNodesImp = outer.mitm
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val coal = outer.dut
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// FIXME: these need to be separate variables because of implicit naming in makeIOs
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// there has to be a better way
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@@ -77,6 +73,8 @@ class DummyCoalescingUnitTBImp(outer: DummyCoalescingUnitTB) extends LazyModuleI
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val coalIO2 = outer.cpuNodes(2).makeIOs()
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val coalIO3 = outer.cpuNodes(3).makeIOs()
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val coalIOs = Seq(coalIO0, coalIO1, coalIO2, coalIO3)
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// val coalMasterNode = coal.coalescerNode.makeIOs()
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}
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class CoalescerUnitTest extends AnyFlatSpec with ChiselScalatestTester {
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@@ -89,11 +87,10 @@ class CoalescerUnitTest extends AnyFlatSpec with ChiselScalatestTester {
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// val outer = LazyModule(new CoalescingUnit(testConfig))
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val coal = tb.dut
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tb.cpuNodes.zip(tb.mitm).foreach { case (a, b) => b := a }
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tb.mitm.foreach(coal.node := _)
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tb.cpuNodes.foreach(coal.node := _)
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tb.l2Nodes.foreach(_ := coal.node)
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test(tb.module) { c =>
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test(tb.module).withAnnotations(Seq(VcsBackendAnnotation, WriteFsdbAnnotation)) { c =>
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val nodes = c.coalIOs.map(_.head)
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// val nodes = c.cpuNodesImp.map(_.out.head._1)
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// val nodes = c.coal.node.in.map(_._1)
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@@ -101,7 +98,7 @@ class CoalescerUnitTest extends AnyFlatSpec with ChiselScalatestTester {
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def pokeA(nodes: Seq[TLBundle], idx: Int, op: Int, size: Int, source: Int, addr: Int, mask: Int, data: Int): Unit = {
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val node = nodes(idx)
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// node.a.ready.expect(true.B) // TODO: this fails currently
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// node.a.ready.expect(true.B) // FIXME: this fails currently
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node.a.bits.opcode.poke(if (op == 1) TLMessages.PutFullData else TLMessages.Get)
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node.a.bits.param.poke(0.U)
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node.a.bits.size.poke(size.U)
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@@ -119,10 +116,14 @@ class CoalescerUnitTest extends AnyFlatSpec with ChiselScalatestTester {
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}
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}
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// always ready to take coalesced requests
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// c.coalMasterNode.head.a.ready.poke(true.B)
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// c.coal.module.coalescer.io.outReq.ready.poke(true.B)
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pokeA(nodes, idx=0, op=1, size=2, source=0, addr=0x10, mask=0xf, data=0x1111)
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pokeA(nodes, idx=1, op=1, size=2, source=1, addr=0x14, mask=0xf, data=0x2222)
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pokeA(nodes, idx=2, op=1, size=2, source=2, addr=0x18, mask=0xf, data=0x3333)
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pokeA(nodes, idx=3, op=1, size=2, source=3, addr=0x1c, mask=0xf, data=0x4444)
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pokeA(nodes, idx=1, op=1, size=2, source=0, addr=0x14, mask=0xf, data=0x2222)
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pokeA(nodes, idx=2, op=1, size=2, source=0, addr=0x18, mask=0xf, data=0x3333)
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pokeA(nodes, idx=3, op=1, size=2, source=0, addr=0x1c, mask=0xf, data=0x4444)
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c.clock.step()
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@@ -381,19 +382,20 @@ class CoalShiftQueueTest extends AnyFlatSpec with ChiselScalatestTester {
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}
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object testConfig extends CoalescerConfig(
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MAX_SIZE = 5, // maximum coalesced size
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DEPTH = 2, // request window per lane
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WAIT_TIMEOUT = 8, // max cycles to wait before forced fifo dequeue, per lane
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ADDR_WIDTH = 24, // assume <= 32
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DATA_BUS_SIZE = 5, // 2^5=32 bytes, 256 bit bus
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NUM_LANES = 4,
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// WATERMARK = 2, // minimum buffer occupancy to start coalescing
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WORD_SIZE = 4, // 32-bit system
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WORD_WIDTH = 2, // log(WORD_SIZE)
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NUM_OLD_IDS = 16, // num of outstanding requests per lane, from processor
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NUM_NEW_IDS = 4, // num of outstanding coalesced requests
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COAL_SIZES = Seq(4, 5),
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SizeEnum = DefaultInFlightTableSizeEnum
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maxSize = 5,
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queueDepth = 2,
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waitTimeout = 8,
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addressWidth = 24,
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dataBusWidth = 5,
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numLanes = 4,
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// watermark = 2,
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wordSizeInBytes = 4,
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wordWidth = 2,
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numOldSrcIds = 16,
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numNewSrcIds = 4,
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respQueueDepth = 4,
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coalSizes = Seq(4, 5),
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sizeEnum = DefaultInFlightTableSizeEnum
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)
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class UncoalescingUnitTest extends AnyFlatSpec with ChiselScalatestTester {
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@@ -482,7 +484,7 @@ class CoalInflightTableUnitTest extends AnyFlatSpec with ChiselScalatestTester {
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numPerLaneReqs,
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sourceWidth,
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offsetBits,
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testConfig.SizeEnum
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testConfig.sizeEnum
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)
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// it should "stop enqueueing when full" in {
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