Enable coverage tests for chiseltest
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@@ -2,6 +2,7 @@ package freechips.rocketchip.tilelink.coalescing
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import chisel3._
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import chisel3._
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import chiseltest._
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import chiseltest._
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import chiseltest.simulator.VerilatorFlags
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import org.scalatest.flatspec.AnyFlatSpec
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import org.scalatest.flatspec.AnyFlatSpec
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import freechips.rocketchip.tilelink._
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import freechips.rocketchip.tilelink._
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import freechips.rocketchip.util.MultiPortQueue
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import freechips.rocketchip.util.MultiPortQueue
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@@ -230,7 +231,7 @@ class CoalescerUnitTest extends AnyFlatSpec with ChiselScalatestTester {
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it should "coalesce fully consecutive accesses at size 4, only once" in {
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it should "coalesce fully consecutive accesses at size 4, only once" in {
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test(LazyModule(new DummyCoalescingUnitTB()).module)
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test(LazyModule(new DummyCoalescingUnitTB()).module)
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.withAnnotations(Seq(VerilatorBackendAnnotation, WriteFstAnnotation))
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.withAnnotations(Seq(VerilatorBackendAnnotation, VerilatorFlags(Seq("--coverage-line")), WriteFstAnnotation))
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// .withAnnotations(Seq(VcsBackendAnnotation, WriteFsdbAnnotation))
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// .withAnnotations(Seq(VcsBackendAnnotation, WriteFsdbAnnotation))
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{ c =>
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{ c =>
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val nodes = c.coalIOs.map(_.head)
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val nodes = c.coalIOs.map(_.head)
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