From 6de95587deaea75c5ce6878cfc13b089f135f8ba Mon Sep 17 00:00:00 2001
From: Hansung Kim <hansung_kim@berkeley.edu>
Date: Sat, 11 Mar 2023 23:20:50 -0800
Subject: [PATCH] Add chiseltest for inflight table

---
 src/main/scala/tilelink/Coalescing.scala |  5 ---
 src/test/scala/CoalescingUnitTest.scala  | 56 ++++++++++++++++++++++++
 2 files changed, 56 insertions(+), 5 deletions(-)
 create mode 100644 src/test/scala/CoalescingUnitTest.scala

diff --git a/src/main/scala/tilelink/Coalescing.scala b/src/main/scala/tilelink/Coalescing.scala
index 48a795d..2029cb3 100644
--- a/src/main/scala/tilelink/Coalescing.scala
+++ b/src/main/scala/tilelink/Coalescing.scala
@@ -153,11 +153,6 @@ class CoalescingUnit(numLanes: Int = 1)(implicit p: Parameters)
     inflightCoalReqTable.io.lookup.ready := tlCoal.d.valid
     inflightCoalReqTable.io.lookupSourceId := tlCoal.d.bits.source
 
-    // FIXME: Reuse ShiftQueue(coalRegEntry) for now, but swap out to actual
-    // table structure
-    // val inflightCoalReqTable = Reg(
-    //   Vec(NumInflightCoalRequests, new InflightCoalReqEntry(sourceWidth))
-    // )
     (node.in zip node.out)(0) match {
       case ((tlIn, edgeIn), (tlOut, _)) =>
         assert(
diff --git a/src/test/scala/CoalescingUnitTest.scala b/src/test/scala/CoalescingUnitTest.scala
new file mode 100644
index 0000000..0fd3ce4
--- /dev/null
+++ b/src/test/scala/CoalescingUnitTest.scala
@@ -0,0 +1,56 @@
+import chisel3._
+import chiseltest._
+import org.scalatest.flatspec.AnyFlatSpec
+import freechips.rocketchip.tilelink._
+
+class MyModule extends Module {
+  val io = IO(new Bundle {
+    val in = Input(UInt(16.W))
+    val out = Output(UInt(16.W))
+  })
+
+  io.out := RegNext(io.in)
+}
+
+class BasicTest extends AnyFlatSpec with ChiselScalatestTester {
+  // test class body here
+  it should "do something" in {
+    // test case body here
+    test(new MyModule) { c =>
+      // test body here
+      c.io.in.poke(0.U)
+      c.clock.step()
+      c.io.out.expect(0.U)
+      c.io.in.poke(42.U)
+      c.clock.step()
+      c.io.out.expect(42.U)
+      println("Last output value :" + c.io.out.peek().litValue)
+    }
+  }
+}
+
+class CoalescingUnitTest extends AnyFlatSpec with ChiselScalatestTester {
+  behavior of "inflight coalesced request table"
+  val numLanes = 4
+  val sourceWidth = 2
+  val entries = 4
+
+  val inflightCoalReqTableEntry =
+    new InflightCoalReqTableEntry(numLanes, sourceWidth)
+
+  it should "whatever" in {
+    test(new InflightCoalReqTable(numLanes, sourceWidth, entries)) { c =>
+      // val tableEntry = new InflightCoalReqTableEntry(numLanes, sourceWidth)
+      val respSourceId = 0.U
+      c.io.enq.valid.poke(true.B)
+      c.io.enq.bits.fromLane.poke(0.U)
+      c.io.enq.bits.respSourceId.poke(respSourceId)
+      c.io.enq.bits.reqSourceIds.foreach { id => id.poke(0.U) }
+      c.clock.step()
+      c.io.lookup.ready.poke(true.B)
+      c.io.lookupSourceId.poke(respSourceId)
+      c.io.lookup.valid.expect(true.B)
+      c.io.lookup.bits.expect(respSourceId)
+    }
+  }
+}