diff --git a/src/main/scala/tilelink/Coalescing.scala b/src/main/scala/tilelink/Coalescing.scala
index b008932..73e84a8 100644
--- a/src/main/scala/tilelink/Coalescing.scala
+++ b/src/main/scala/tilelink/Coalescing.scala
@@ -1137,11 +1137,8 @@ class Uncoalescer(
     val chunks = Wire(Vec(numChunks, UInt(32.W)))
     val offsets = (0 until numChunks)
     (chunks zip offsets).foreach { case (c, o) =>
-      // FIXME: whether to take the offset from MSB or LSB depends on
-      // endianness.  Confirm this is working
+      // NOTE: Should take offset starting from LSB
       c := data(32 * (o + 1) - 1, 32 * o)
-      // If taking from MSB:
-      // c := (data >> (dataWidth - (o + 1) * 32)) & sizeMask
     }
     chunks(offset) // MUX
   }