diff --git a/src/main/scala/tilelink/TracerSystemMem.scala b/src/main/scala/tilelink/TracerSystemMem.scala
index d9d1682..f9e8324 100644
--- a/src/main/scala/tilelink/TracerSystemMem.scala
+++ b/src/main/scala/tilelink/TracerSystemMem.scala
@@ -4,6 +4,8 @@ import freechips.rocketchip.diplomacy.LazyModule
 import freechips.rocketchip.subsystem.BaseSubsystem
 import org.chipsalliance.cde.config.Parameters
 
+// TODO: possibly move to somewhere closer to CoalescingUnit
+
 // The trait is attached to DigitalTop of Chipyard system, informing it indeed
 // has the ability to attach GPU tracer node onto the system bus
 trait CanHaveMemtraceCore { this: BaseSubsystem =>