wu-arch/radiance
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

Bump vortex with multi-warp tensor core fix

Browse Source
This commit is contained in:
Hansung Kim
2024-05-25 20:13:56 -07:00
parent 114dd75f2f
commit 09d9d3c3f9
2 changed files with 4 additions and 2 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
src/main/resources/vsrc/vortex

Submodule src/main/resources/vsrc/vortex updated: 45d86b26a2...864265bda5

4
src/main/scala/radiance/memory/VortexCache.scala
View File

@@ -127,7 +127,9 @@ class VortexBankPassThrough(config: VortexL1Config)(implicit p: Parameters)
// hack due to not doing proper param negotiations across disconnected // hack due to not doing proper param negotiations across disconnected
// Diplomacy graphs. // Diplomacy graphs.
// println(s"${upstream.params.sourceBits} <= ${downstream.params.sourceBits}") // println(s"${upstream.params.sourceBits} <= ${downstream.params.sourceBits}")
require(upstream.params.sourceBits <= downstream.params.sourceBits) require(upstream.params.sourceBits <= downstream.params.sourceBits,
"mem-side source of L1 cache truncates core-side source! " +
"Try lowering core or coalescer srcIds")
downstream.a <> upstream.a downstream.a <> upstream.a
upstream.d <> downstream.d upstream.d <> downstream.d