15 lines
280 B
Verilog
15 lines
280 B
Verilog
`ifndef VX_F_D_INTER
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`define VX_F_D_INTER
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`include "VX_define.vh"
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interface VX_inst_meta_if ();
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wire [31:0] instruction;
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wire [31:0] inst_pc;
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wire [`NW_BITS-1:0] warp_num;
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wire [`NUM_THREADS-1:0] valid;
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endinterface
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`endif |