Blaise Tine 95f057bc2e fpga build refactoring

2021-04-29 06:17:28 -07:00

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modelsim

code refactoring: DRAM => MEM renaming

2021-04-26 00:58:48 -07:00

opae

fpga build refactoring

2021-04-29 06:17:28 -07:00

quartus

quartus synthesis build update

2021-04-19 21:29:39 -07:00

synopsys

fix opae build

2020-04-20 12:51:42 -07:00

yosys

scope refactoring: adding modules definitions to VCD trace

2020-10-12 23:26:02 -04:00