18 lines
285 B
Verilog
18 lines
285 B
Verilog
`ifndef VX_GPU_SNP_REQ_RSP
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`define VX_GPU_SNP_REQ_RSP
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`include "../cache/VX_cache_config.vh"
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interface VX_gpu_snp_req_rsp_if ();
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// Snoop request
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wire snp_req_valid;
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wire [31:0] snp_req_addr;
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wire snp_req_ready;
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// Snoop Response
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// TODO:
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endinterface
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`endif |